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RISS 인기검색어
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- 저자 : Jiuyi Feng (검색결과 3 건)
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Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter
Jiuyi Feng,Wenxiang Song,Yuan Xu,Fei Wang 대한전기학회 2017 Journal of Electrical Engineering & Technology Vol.12 No.5
Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the highprecision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.
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Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter
Feng, Jiuyi,Song, Wenxiang,Xu, Yuan,Wang, Fei The Korean Institute of Electrical Engineers 2017 Journal of Electrical Engineering & Technology Vol.12 No.5
Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.
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A Compensation Method of Dead-Time and Forward Voltage Drop for Inverter Operating at Low Frequency
Lingyun Zhao,Wenxiang Song,Jiuyi Feng 대한전기학회 2019 Journal of Electrical Engineering & Technology Vol.14 No.2
The dead-time is introduced to prevent the upper and lower power devices of the same leg from conducting simultaneously. However, it will cause the actual output voltage deviate from the desired voltage and the load current distortion will occur, which is especially unexpected when the inverter operates at a low frequency. In addition, a voltage drop is produced when the current fl ows through the power device, which further aggravates the current distortion. This paper presents a simple compensation strategy for the dead-time and the forward voltage drop. The current polarity is obtained accurately by fi ltering the three-phase currents in the synchronous rotating coordinate. The driving signals in the SVPWM is adjusted according to the current polarity to compensate the dead-time. The forward voltage drops are equivalent to an error voltage vector by using the approximate average threshold voltage and average diff erential resistance model, which is added to the given voltage to suppress the eff ects of the forward voltage drops. The compensation quantities are set to change based on a piece wise linear function to eliminate the occurrence of the current clamp and the instantaneous zero-crossing switch. Finally, the proposed compensation strategy is verifi ed by the simulation and experiment.
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