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Takahashi, Toshitake,Nichols, Patricia,Takei, Kuniharu,Ford, Alexandra C,Jamshidi, Arash,Wu, Ming C,Ning, C Z,Javey, Ali IOP Pub 2012 Nanotechnology Vol.23 No.4
<P>Spatially composition-graded CdS<SUB>x</SUB>Se<SUB>1−x</SUB> (x = 0–1) nanowires are grown and transferred as parallel arrays onto Si/SiO<SUB>2</SUB> substrates by a one-step, directional contact printing process. Upon subsequent device fabrication, an array of tunable-wavelength photodetectors is demonstrated. From the spectral photoconductivity measurements, the cutoff wavelength for the device array, as determined by the bandgap, is shown to cover a significant portion of the visible spectrum. The ability to transfer a collection of crystalline semiconductor nanowires while preserving the spatially graded composition may enable a wide range of applications, such as tunable lasers and photodetectors, efficient photovoltaics, and multiplexed chemical sensors.</P>
Nanoscale Semiconductor “X” on Substrate “Y” – Processes, Devices, and Applications
Madsen, Morten,Takei, Kuniharu,Kapadia, Rehan,Fang, Hui,Ko, Hyunhyub,Takahashi, Toshitake,Ford, Alexandra C.,Lee, Min Hyung,Javey, Ali WILEY‐VCH Verlag 2011 ADVANCED MATERIALS Vol.23 No.28
<P><B>Abstract</B></P><P>Recent advancements in the integration of nanoscale, single‐crystalline semiconductor ‘X’ on substrate ‘Y’ (XoY) for use in transistor and sensor applications are presented. XoY is a generic materials framework for enabling the fabrication of various novel devices, without the constraints of the original growth substrates. Two specific XoY process schemes, along with their associated materials, device and applications are presented. In one example, the layer transfer of ultrathin III–V semiconductors with thicknesses of just a few nanometers on Si substrates is explored for use as energy‐efficient electronics, with the fabricated devices exhibiting excellent electrical properties. In the second example, contact printing of nanowire‐arrays on thin, bendable substrates for use as artificial electronic‐skin is presented. Here, the devices are capable of conformably covering any surface, and providing a real‐time, two‐dimensional mapping of external stimuli for the realization of smart functional surfaces. This work is an example of the emerging field of “<I>translational nanotechnology</I>” as it bridges basic science of nanomaterials with practical applications.</P>
Ultrathin compound semiconductor on insulator layers for high-performance nanoscale transistors
Ko, Hyunhyub,Takei, Kuniharu,Kapadia, Rehan,Chuang, Steven,Fang, Hui,Leu, Paul W.,Ganapathi, Kartik,Plis, Elena,Kim, Ha Sul,Chen, Szu-Ying,Madsen, Morten,Ford, Alexandra C.,Chueh, Yu-Lun,Krishna, Sanj Nature Publishing Group, a division of Macmillan P 2010 Nature Vol.468 No.7321
Over the past several years, the inherent scaling limitations of silicon (Si) electron devices have fuelled the exploration of alternative semiconductors, with high carrier mobility, to further enhance device performance. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied: such devices combine the high mobility of III??V semiconductors and the well established, low-cost processing of Si technology. This integration, however, presents significant challenges. Conventionally, heteroepitaxial growth of complex multilayers on Si has been explored??but besides complexity, high defect densities and junction leakage currents present limitations in this approach. Motivated by this challenge, here we use an epitaxial transfer method for the integration of ultrathin layers of single-crystal InAs on Si/SiO<SUB>2</SUB> substrates. As a parallel with silicon-on-insulator (SOI) technology, we use ??XOI?? to represent our compound semiconductor-on-insulator platform. Through experiments and simulation, the electrical properties of InAs XOI transistors are explored, elucidating the critical role of quantum confinement in the transport properties of ultrathin XOI layers. Importantly, a high-quality InAs/dielectric interface is obtained by the use of a novel thermally grown interfacial InAsO<SUB>x</SUB> layer (~1?nm thick). The fabricated field-effect transistors exhibit a peak transconductance of ~1.6?mS?쨉m<SUP>??1</SUP> at a drain??source voltage of 0.5?V, with an on/off current ratio of greater than 10,000.