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- 저자 : Aashish Parihar (검색결과 1 건)
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Fast and High-throughput Montgomery Modular Multiplier for RSA Encryption and Decryption
Aashish Parihar,Sangeeta Nakhate 대한전자공학회 2018 IEIE Transactions on Smart Processing & Computing Vol.7 No.2
This paper proposes a fast and high-throughput Montgomery modular multiplier that outputs a modular product in binary form. Intermediate operands are kept in carry-save form and added through a two-level, carry-save adder architecture. A carry look-ahead adder is also employed in this multiplier for operand pre-computation and converting the final output from carrysave form to binary form, which accounts for additional clock cycles. The proposed multiplier computes the next two quotients during the i<SUP>th</SUP> iteration to minimize critical path delay, and computes intermediate output for the (i + 2)<SUP>th</SUP> iteration while skipping the (і + 1)<SUP>th</SUP> iteration. In this way, the overall time required for multiplication is minimized significantly, and additional clock cycles required for operand pre-computation and format conversion can be ignored. Experimental results show that the proposed Montgomery modular multiplier can achieve significant speed and throughput improvement, compared to previous designs.
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