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- 저자 : 최세곤 ( Youn Hee Lee (검색결과 3 건)
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서희돈,이윤희,박종대,최세곤 ( Hee Don Seo,Youn Hee Lee,Jong Dae Park,Se Gon Choi ) 한국센서학회 1993 센서학회지 Vol.2 No.1
Capacitive pressure sensor for low pressure measurements has been fabricated by using n^+ epitaxial layer electrochemical etching stop and glass-to-silicon electrostatic bonding technique. The sensor had hybrid configuration of a sensor chip, which consists of sensor capacitor and reference capacitor, and two output signal detection IC chips. A fabricated sensor, with a 1.0X1.0 ㎟ square size and a 10 pm thick flat diaphragm, showed a 7.1 pF zero pressure capacitance, and 5.2 % F. S. sensitivity in 10 KPa pressure range. By using a capacitance to voltage converter, the thermal zero shift of 0.051 % F. S. and the thermal sensitivity shift of 0.12 % F. S. C for temperature range of 5∼45℃ were obtained.
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이윤희,택전신사 (澤田辛司),서희돈,최세곤 ( Youn Hee Lee,Kouji Sawada,Hee Don Seo,Se Gon Choi ) 한국센서학회 1996 센서학회지 Vol.5 No.5
In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.
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崔世崑,李允熙,徐熙敦 嶺南大學校 工業技術硏究所 1993 工業技術硏究所論文集 Vol.21 No.2
본 논문은 용량형 센서의 용량출력 신호를 검출하기 위한 용량-전압 변환 및 용량-주파수 변환 인터페이스 회로를 설계 및 제작한 것이다. 기생용량의 영향을 줄이기 위해 SC형 적분기를 이용한 용량-전압 인터페이스 회로와 슈미트 트리거 및 무안정 멀티바이브레이터를 이용한 용량-주파수 인터페이스 회로를 PSPICE를 이용하여 설계하고 CMOS 기술로 제작 하였다. 설계과정에서 출력특성의 온도의존성 문제를 개선하기 위하여 전원전압 조절방법과 CMOS 차동증폭기를 이용한 새로운 방법을 제안하였다. 이들 회로의 시뮬레이션과 실제 제작된 칩의 특성측정 결과온도의 영향은 전원전압의 약 2V일때 가장 적었으며 차동증폭기를 이용함으로써 훨씬 줄어들었다. 따라서 제작된 인터페이스 회로들은 집적화 용량형 압력센서의 용량검출회로로 사용될 수 있다. This paper describes the design and fabrication of C-F and C-V interface circuitry which convert the absolute capacitance into frequency and voltage in a capacitive sensor. These circuits are designed to minimize the offset of a stray capacitance using a schmitt trigger oscillator, an astable multivibrator and a switched capacitor integrator, respectively, and are fabricated on CMOS process. In order to improve the temperature dependency of the interface circuit, we report supply voltage and temperature unsusceptible method and novel circuit using CMOS differential amplifier. The results of the computer simulation and the experimental measurement show that the temperature shift is minimized when the gate source voltage is about 2V, and improved more and more by the differential amplifier circuit. The interface circuits can be used as the output signal detecting circuit of the integrated capacitive pressure sensor.
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