http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
저 전압 트리거형 ESD 보호회로를 탑재한 저 전압 Step-down DC-DC Converter 설계
육승범,이재현,구용서,Yuk, Seung-Bum,Lee, KJae-Hyun,Koo, Yong-Seo 한국전기전자학회 2006 전기전자학회논문지 Vol.10 No.2
In this study, the design of low voltage DC-DC converter with low triggering ESD (Electro-Static Discharge) protection circuit was investigated. The purpose of this paper is design optimization for low voltage(2.5V to 5.5V input range) DC-DC converter using CMOS switch. In CMOS switch environment, a dominant loss component is not switching loss but conduction loss at 1.2MHz switching frequency. In this study a constant frequency PWM converter with synchronous rectifier is used. And zener Triggered SCR device to protect the ESD phenomenon was designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 8V.
High-Speed I/O Circuit을 위한 새로운 구조의 나노급 LILVTSCR ESD 보호회로에 대한 연구
이조운(Jo-Woon Lee),육승범(Seung-Bum Yuk),손정만(Jung-Man Son),박미정(Mi-Jung Park),구용서(Young-Seo Koo) 대한전자공학회 2006 대한전자공학회 학술대회 Vol.2006 No.11
A novel latch-up immunity low voltage trigger silicon-controlled rectifier (LILVTSCR) for high -speed I/O circuit. The proposed LILVTSCR offers a reduced triggering voltage level as well as the enhanced ESD performance of the SCR devices. From the simulation results, the triggering voltage of the LILVTSCR is 2.8V~7.2V as the gate length of the LILVTSCR device is 0.5㎛~1.0㎛. And this structure reduces the latch-up phenomenon by using tum on/off character of N-channel and P-channel MOSFETs in SCR structure.
낮은 온 저항을 가지는 스위칭 소자 내장형 저전압 DC-DC 컨버터 설계
박미정(Mi-Jung Park),손정만(Jung-Man Son),육승범(Seung-Bum Yuk),선기쁨(Gi-Bbum Sun),구용서(Yong-Seo Koo) 대한전자공학회 2007 대한전자공학회 학술대회 Vol.2007 No.7
In this study, the design of low voltage DC-DC converter with switching device having low on-resistance. The switching device with low on-resistance was designed to decrease conduction loss. The PWM control circuits was made of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. DC-DC converter, based on the PWM control circuits and low on-resistance switching device, achieved the high efficiency closed to 94% at 450mA output current.
새로운 구조의 LDMOSFET 소자 설계 및 전기적 특성 연구
박미정(Mi-Jung Park),이조운(Jo-Woon Lee),이재현(Jae-Hyun Lee),육승범(Seung-Bum Yuk),구용서(Yong-Seo Koo) 대한전자공학회 2006 대한전자공학회 학술대회 Vol.2006 No.11
In this study, New structural LDMOSFET is proposed and It’s electric Characteristic is analysed Compared with the conventional LDMOSFET, the proposed LDMOSFET exhibits better trade-off relation between the on-resistance and breakdown capability. Novel device employs Double-Drain/twin pwell and two different Drift doping, based on RESURF(Reduced-SURface-Field) principle. Consquently, proposed device designed with stand breakdown voltage of 310V and the specific on-resistance of 80mΩㆍ㎠ through optimization between the breakdown voltage and the specific on resistance of device.