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김종호(Jong-Ho Kim),권오선(Oh-Sun Kwon),김무찬(Moo-Chan Kim),정재한(Jae-Han Jung),최현진(Hyun-Jin Choi),정한울(Han-Wool Jeong) 대한전자공학회 2023 대한전자공학회 학술대회 Vol.2023 No.6
This paper presents a new approach to optimize the design of SRAM in embedded memory, utilizing machine learning techniques. Recently, there has been growing interest in utilizing reinforcement learning for circuit design. Thus, this paper proposes a method that applies reinforcement learning to circuit design parameters to automatically find optimal values. Specifically, the proposed approach employs reinforcement learning in a multi-dimensional parameter space to minimize read access time while ensuring the target sensing yield is met. The experiments were conducted on the ASAP7 PDK with 7nm FinFET technology. The results demonstrate that the Q-learning method reduces computation time by 50% compared to exhaustive search. Furthermore, by utilizing yield fail programming, the optimal value for the fourdimensional parameter was obtained in just 9 hours, reducing the design time by approximately 67.6% compared to the exhaustive search method.