http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
Hydrothermal Synthesis of Ni-MOF Vulcanized Derivatives for High-Performance Supercapacitors
Shuwen Gao,Yanwei Sui,Fuxiang Wei,Jiqiu Qi,Qingkun Meng,Yaojian Ren,Yezeng He 성균관대학교(자연과학캠퍼스) 성균나노과학기술원 2019 NANO Vol.14 No.3
A series of nickel sulfides derived from the hexagonal Ni-MOF are vulcanized through adjusting the hydrothermal time and the thiourea concentration. Among all the obtained nickel sulfides, one sample Ni-S2-3, which inherits the Ni-MOF's morphology, shows the best electrochemical performance with a remarkable specific capacitance of 1128 Fg -1 at 1 Ag -1, a rate capacitance of 50% and a long cycle life of 74% retention after 5000 cycles. Furthermore, the asymmetrical supercapacitors (SCs) based on Ni-S2-3//AC exhibit a good supercapacitive performance with a maximum power density of 16.3 Wh kg -1 at a power density of 800 Wkg -1. All these results indicate that vulcanizing Ni-MOF is an effective way to fabricate a superior electrode material with excellent electrochemical performance for SCs.
NANDFlashSim : High-Fidelity, Microarchitecture-Aware NAND Flash Memory Simulation
Jung, Myoungsoo,Choi, Wonil,Gao, Shuwen,Wilson III, Ellis Herbert,Donofrio, David,Shalf, John,Kandemir, Mahmut Taylan Association for Computing Machinery 2016 Acm transactions on storage Vol.12 No.2
<P>As the popularity of NAND flash expands in arenas from embedded systems to high-performance computing, a high-fidelity understanding of its specific properties becomes increasingly important. Further, with the increasing trend toward multiple-die, multiple-plane architectures and high-speed interfaces, flash memory systems are expected to continue to scale and cheapen, resulting in their broader proliferation. However, when designing NAND-based devices, making decisions about the optimal system configuration is nontrivial, because flash is sensitive to a number of parameters and suffers from inherent latency variations, and no available tools suffice for studying these nuances. The parameters include the architectures, such as multidie and multiplane, diverse node technologies, bit densities, and cell reliabilities. Therefore, we introduce NANDFlashSim, a high-fidelity, latency-variation-aware, and highly configurable NAND-flash simulator, which implements a detailed timing model for 16 state-of-the-art NAND operations. Using NANDFlashSim, we notably discover the following. First, regardless of the operation, reads fail to leverage internal parallelism. Second, MLC provides lower I/O bus contention than SLC, but contention becomes a serious problem as the number of dies increases. Third, many-die architectures outperform many-plane architectures for disk-friendly workloads. Finally, employing a high-performance I/O bus or an increased page size does not enhance energy savings. Our simulator is available at http://nfs.camelab.org.</P>