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Carrier Based Single-State PWM Technique for Minimizing Vector Errors in Multilevel Inverters
Nho, Nguyen Van,Hai, Quach Thanh,Lee, Hong-Hee The Korean Institute of Power Electronics 2010 JOURNAL OF POWER ELECTRONICS Vol.10 No.4
In this paper, a novel analysis of a carrier based PWM method for multilevel inverters is presented. The space vector PWM and carrier based PWM correlations in multilevel inverters are investigated in a nominal two-level switching diagram. The obtained results can be applied to design various carrier PWM techniques. In this paper, a carrier based single-state PWM technique, which reduces the switching number and optimizes the active voltage errors, is presented. This PWM technique can be advantageous if there are a large number of levels. The proposed method is mathematically formulated and demonstrated by simulations and experimental results.
A Single Carrier Multi-Modulation Method In Multilevel Inverters
Nguyen Van Nho,Myung Joong Youn 전력전자학회 2005 JOURNAL OF POWER ELECTRONICS Vol.5 No.1
A novel variant of full multi-modulation applications to diode-clamped and cascade multilevel inverter-termed single carrier multi-modulation is presented. The proposed PWM-technique is advantageous for its simple implementation. The correlation between multi-carrier and single-carrier multi-modulations is deduced. For the PWM methods, a mathematical model of voltage source inverter and general algorithm for the multi-modulating modulator are proposed. The theory is demonstrated by simulation results.
Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters
Nho-Van Nguyen,Hai-Thanh Quach,Hong-Hee Lee 전력전자학회 2012 JOURNAL OF POWER ELECTRONICS Vol.12 No.4
In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.
Nho-Van Nguyen,Tam-Khanh Tu Nguyen,Hong-Hee Lee 전력전자학회 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.2
This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.
A Single Carrier Multi-Modulation Method In Multilevel Inverters
Nho Nguyen Van,Youn Myung Joong The Korean Institute of Power Electronics 2005 JOURNAL OF POWER ELECTRONICS Vol.5 No.1
A novel variant of full multi-modulation applications to diode-clamped and cascade multilevel inverter-termed single carrier multi-modulation is presented. The proposed PWM-technique is advantageous for its simple implementation. The correlation between multi-carrier and single-carrier multi-modulations is deduced. For the PWM methods, a mathematical model of voltage source inverter and general algorithm for the multi-modulating modulator are proposed. The theory is demonstrated by simulation results
Nho-Van Nguyen,Tam-Khanh Tu Nguyen 전력전자학회 2019 JOURNAL OF POWER ELECTRONICS Vol.19 No.4
This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) thatprovide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences thatapply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former andan existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on ageneral switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods aresimple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHBinverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes asindicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of themodulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimentalresults are provided to verify the effectiveness of the proposed PWM methods.
Carrier Based Single-State PWM Technique for Minimizing Vector Errors in Multilevel Inverters
Nguyen Van Nho,Quach Thanh Hai,Hong-Hee Lee 전력전자학회 2010 JOURNAL OF POWER ELECTRONICS Vol.10 No.4
In this paper, a novel analysis of a carrier based PWM method for multilevel inverters is presented. The space vector PWM and carrier based PWM correlations in multilevel inverters are investigated in a nominal two-level switching diagram. The obtained results can be applied to design various carrier PWM techniques. In this paper, a carrier based single-state PWM technique, which reduces the switching number and optimizes the active voltage errors, is presented. This PWM technique can be advantageous if there are a large number of levels. The proposed method is mathematically formulated and demonstrated by simulations and experimental results.
Nho-Van Nguyen,Mon-Van Doi 전력전자학회 2019 ICPE(ISPE)논문집 Vol.2019 No.5
The paper presents a new Carrier based PWM method for 3-level NPC inverter to simultaneously mitigate neutral point (NP) voltage variation and to reduce common mode voltage (CMV). The proposed PWM method can be performed with double modulation waves. An offset modification helps to determine RCMV PWM patterns with zero NP current. Then, hybrid reduced CMV PWM patterns have been designed to minimize number of extra switching and to bring down line voltage stress dv/dt to a half value. Finally, various current based RCMV-PWM methods have been proposed to suppress NP voltage oscillation. The theoretical analysis will be verified by simulation and experimental results.
Nguyen, Nho-Van,Nguyen, Tam-Khanh Tu,Lee, Hong-Hee The Korean Institute of Power Electronics 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.2
This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.
A Unified Carrier Based PWM Method In Multilevel Inverters
Nguyen Van Nho,Myung Joong Youn 전력전자학회 2005 JOURNAL OF POWER ELECTRONICS Vol.5 No.2
This paper presents a systematic approach to study the carrier based pulse width modulation (PWM) techniques applied to diode-clamped and cascade multilevel inverters by using multi-modulating patterns. This method is based on the description of controllable redundant parameters in the modulating signals. A unified mathematical formulation is presented for carrier based PWM methods, which obtains outputs similar to the corresponding space vector PWM. A full and separate control of the fundamental voltage, vector redundancies and phase redundancies can be obtained in the carrier based PWM.<br/> In this paper, the proposed PWM method and corresponding algorithm for generating multi-modulating signals will be formulated and demonstrated by our simulations.