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RISS 인기검색어
- 검색키워드
- 저자 : Meeturani Jagdishram Sharma (검색결과 1 건)
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Meeturani Jagdishram Sharma 건국대학교 대학원 2012 국내석사
In this research work, a fast and cost-effective algorithm for computing the two-dimensional 4×4 integer transform using the 8×8 integer transform for H.264 is presented. It is shown that both 4×4 and 8×8 integer transforms can be implemented by simple addition operations by Kronecker product and direct sum operations. The 4×4 and 8×8 integer transforms are broken into stages, and by inserting input reordering matrices, about half of the blocks of the 4×4 integer transform are implemented via stages of the 8×8 integer transform. The dual clock pipelined architecture is proposed based on integer matrix decomposition of forward transform. The synthesis result shows that the proposed design requires approximately 46K gates. The design achieves a throughput of 14G pixels/sec for 4×4 integer transform computation and 18.7G pixels/sec for 8×8 integer transform computation. The proposed architecture has 2 times the throughput of the other existing architectures with smaller resource consumption. Due to the high throughput to area ratio, the proposed design can effectively be integrated into real-time processing of H.264/AVC high definition video.
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