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Single Device를 사용한 조도센서용 eFuse OTP IP 설계
에치크 수아드,김홍주,김도훈,권순우,하판봉,김영희,Souad, Echikh,Jin, Hongzhou,Kim, DoHoon,Kwon, SoonWoo,Ha, PanBong,Kim, YoungHee 한국전기전자학회 2022 전기전자학회논문지 Vol.26 No.3
A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.