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A Multiple-Output Current Mirror with Neuron MOSFETs
Akio Shimizu,Yuki Nobe,Yohei Ishikawa,Sumio Fukai 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7
In this paper, we propose a multiple-output current mirror with neuron MOSFETs. The proposed circuit is composed of a transimpedance amplifier with multiple-output. Consequently, the proposed circuit has high current copy accuracy and a high output swing. Then the proposed circuit has two output terminals for a high performance operational amplifier and a high resolution digital-to-analog converter. The proposed circuit is designed by using the device parameter of the standard CMOS 1.2㎛ process. The performance of the proposed circuit is evaluated by HSPICE simulation. Simulation results show that the error rate of current copy in the proposed circuit is ±0.001[%] when output voltage is 0.13[V] and over.
Effectiveness of Priority Control Method by Using Cgroups in KVM
Ryoji Kinoshita,Hideaki Moriyama,Yohei Ishikawa,Akira Suganuma 대한전자공학회 2015 ITC-CSCC :International Technical Conference on Ci Vol.2015 No.6
Recently, the performance of CPUs is improving by the technology of integrating circuits. By this improving, CPUs satisfies the demand which is needed for executing software on the computer. Therefore, CPUs aren’t always used fully. To use CPU more efficiently, the virtualization technology is used in various situations such as Web service, database service, cloud computing service, and so on. In this technology, users can integrate plural VMs (Virtual Machines) on one physical computer. However, when the number of processor cores is less than the number of VMs, the scheduler can’t concurrently allocate the CPU to all VMs. In this situation, each VM is allocated the CPU by the time sharing. Therefore, when all processor cores are allocated to other executions, the executable VM waits for allocating the CPU. This situation becomes the problem when the CPU is needed for real time processing on the VM, which is ready to execute. To solve this problem, we proposed Priority Control Method, which enables us to control allocating the CPU resources for each VM. Moreover, we evaluated the effectiveness of Priority Control Method by using the priority of the process before. However, we didn’t evaluate this method in Fedora 20 that is latest version of Fedora. Moreover, Fedora 20 has cgroups (Control Groups) that is the function of managing resources. Cgroups includes the function for the control of allocating the CPU to each VM. In this paper, we describe the effectiveness of Priority Control Method with KVM (Kernel-based Virtual Machine), which is one of methods for the virtualization of the computer. Moreover, we describe the evaluation that we tried to control allocating CPU for VMs by using cgroups in KVM.
Multi-valued SRAM cell with FG-MOSFETs
Yoshikazu ISHIMARU,Akio SHIMIZU,Yohei ISHIKAWA,Sumio FUKAI 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
In this paper, we propose a novel Multi-valued SRAM cell composed of Floating Gate-MOSFETs (FGMOSFETs). The proposed circuit can memorize multiple signals per memory cell, and effective to use it as SRAM cell with a multi-valued logic system. The proposed circuit is the Multivalued SRAM cell that can be composed of a little number of elements. Power consumption of the proposed circuit can be expected to become lower than that of the conventional circuit. The proposed circuit is designed by using the device parameter of standard CMOS 1.2㎛ process. The performance of Multi-valued SRAM cell is evaluated by HSPICE simulation.
A neuron MOS current mirror with a transimpedance amplifier
Akio Shimizu,Sumio Fukai,Yohei Ishikawa 대한전자공학회 2008 ITC-CSCC :International Technical Conference on Ci Vol.2008 No.7
In this paper, we proposed a neuron MOS current mirror with a transimpedance amplifier. The conventional circuit is composed of a voltage amplifier and resistances. However, the resistance voltage drop makes operating range narrow. The proposed circuit is composed of the transimpedance amplifier. And the proposed circuit will be high current copy accuracy and wide operating range. The neuron MOS current mirrors are designed by using device parameter of the standard CMOS 1.2㎛ process. The performance of the proposed circuit is evaluated by HSPICE simulation. Simulation results show that the proposed circuit has better current copy accuracy without the resistances, and low voltage operation.
A neuron MOS current mirror with a fully differential amplifier
Akio Shimizu,Yoshikazu Ishimaru,Yohei Ishikawa,Sumio Fukai 대한전자공학회 2007 ITC-CSCC :International Technical Conference on Ci Vol.2007 No.7
In this paper, we proposed a neuron MOS current mirror with a fully differential amplifier. Simulation results show that the proposed circuit has better current copy accuracy and low voltage operation. The error rate of current copy in the proposed circuit is ±0.05[%]. And the proposed circuit is the active region in Vout ≥ 0.6[V].