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José María Hinojo,Clara Luján-Martínez,Antonio Torralba,Jaime Ramírez-Angulo 한국전자통신연구원 2017 ETRI Journal Vol.39 No.3
A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of 433.80 µV/mA and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of 1 µs. The total current consumption is 17.88 µA (for a 0.9 V supply voltage).
Low-Voltage Tunable Pseudo-Differential Transconductor with High Linearity
Juan Antonio Gómez,Melita Pennisi,Antonio Lopez Martin,Ramon González Carvajal,Jaime Ramírez-Angulo,Manuel Pedro Carrasco 한국전자통신연구원 2009 ETRI Journal Vol.31 No.5
A novel tunable transconductor is presented. Input transistors operate in the triode region to achieve programmable voltage-to-current conversion. These transistors are kept in the triode region by a novel negative feedback loop which features simplicity, low voltage requirements, and high output resistance. A linearity analysis is carried out which demonstrates how the proposed transconductance tuning scheme leads to high linearity in a wide transconductance range. Measurement results for a 0.5 μm CMOS implementation of the transconductor show a transconductance tuning range of more than a decade (15 μA/V to 165 μA/V) and a total harmonic distortion of -67 dB at 1 MHz for an input of 1 Vpp and a supply voltage of 1.8 V.