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    A 23.4 mW 68 dB Dynamic Range Low Band CMOS Hybrid Tracking Filter for ATSC Digital TV Tuner Adopting RC and Gm-C Topology

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    https://www.riss.kr/link?id=A107568982

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    <P>In this paper, a 48-200 MHz CMOS hybrid tracking low-pass filter with low power and high dynamic range is presented to solve a local oscillator harmonic-mixing problem for Advanced Television Systems Committee terrestrial digital TV tuner integrated circuits. For low power consumption, the first-order passive RC filter and the second-order transconductor-C filter are combined to implement the third-order Chebyshev tracking low-pass filter. A transconductor linearization technique based on a method of multiple gated transistors is adopted to achieve high dynamic range. Fabricated in a 0.18 μm CMOS process, it achieves a maximum in-band input-referred noise density of 5.1 nV/√Hz and maximum in-band output-referred third-order intercept point of 17.3 dBm, while dissipating 23.4 mW with 1.8 V. The total chip area is 0.6 mm × 0.4 mm.</P>
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    <P>In this paper, a 48-200 MHz CMOS hybrid tracking low-pass filter with low power and high dynamic range is presented to solve a local oscillator harmonic-mixing problem for Advanced Television Systems Committee terrestrial digital TV tuner int...

    <P>In this paper, a 48-200 MHz CMOS hybrid tracking low-pass filter with low power and high dynamic range is presented to solve a local oscillator harmonic-mixing problem for Advanced Television Systems Committee terrestrial digital TV tuner integrated circuits. For low power consumption, the first-order passive RC filter and the second-order transconductor-C filter are combined to implement the third-order Chebyshev tracking low-pass filter. A transconductor linearization technique based on a method of multiple gated transistors is adopted to achieve high dynamic range. Fabricated in a 0.18 μm CMOS process, it achieves a maximum in-band input-referred noise density of 5.1 nV/√Hz and maximum in-band output-referred third-order intercept point of 17.3 dBm, while dissipating 23.4 mW with 1.8 V. The total chip area is 0.6 mm × 0.4 mm.</P>

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