Polysilicon doping and annealing process at 850℃, which is compatible to CMOS fabrication, is developed. In case of monolithic integration of the surface micromachined polysilicon structures with on-chip circuitry, especially CMOS-first approach, hi...
Polysilicon doping and annealing process at 850℃, which is compatible to CMOS fabrication, is developed. In case of monolithic integration of the surface micromachined polysilicon structures with on-chip circuitry, especially CMOS-first approach, high temperature process must be avoided to minimize the effect on circuits. In this study, we developed the doping process with POCl_(3) liquid source at low temperature for 2μm thick polysilicon. We also studied the effect on mechanical and electrical properties of polysilicon for doping temperatures(850℃~1000℃), temperatures of polysilicon deposition(585℃, 625℃), and the type of sacrificial layers(undoped TEOS oxide, TEOS oxide doped with POCl_(3), PSG). Low tensile stress(53με) and low stress gradient(+1.28MPa/μm) are obtained by varying doping time at 850℃. Low resistivity(<1mΩ-cm) and uniform doping profile of polysilicon are also obtained in this work. We also studied the effect of doping temperature on characteristics of CMOS with 1.5 μm design rule.