We propose a new VLSI architecture for the three step search algorithm for motion estimation of moving images. In the proposed architecture the regular data input is possible and the data are passed through all computational processes, minimizing the ...
We propose a new VLSI architecture for the three step search algorithm for motion estimation of moving images. In the proposed architecture the regular data input is possible and the data are passed through all computational processes, minimizing the input bandwidth. The performance is analyzed in detail, and compared with other architectures. The performance is approaching to the ideal computation speed, with less hardware than for the existing architectures.