Energy-Efficient Energy Harvesting Interface and Low-Dropout Regulator Using Switched-Capacitor Networks = 스위치드 캐패시터 네트워크를 활용한 에너지 효율적인 에너지 하베스팅 인터페이스 및 LDO 레귤레이터

다국어 초록 (Multilingual Abstract)

Switched-capacitor (SC) architectures have emerged as a key enabler in the design of DC-DC converters due to their inherent ability to deliver high power density and energy efficiency within compact form factors. Unlike traditional inductive converters, SC-based designs eliminate the need for bulky inductors, making them well-suited for applications requiring tight on-chip integration, particularly in advanced CMOS processes. This is especially critical for modern systems such as IoT devices, where stringent form factor and weight constraints demand highly integrated, efficient power management solutions.
In high-performance computing applications, the shift toward lower supply voltages further requires the low-dropout (LDO) regulators to operate with enhanced power density and high efficiency, along with low supply voltage operation. Switched-capacitor networks are also advantageous for such LDO regulators, offering not only high power density but also fast transient response and low energy consumption, even under demanding low-voltage conditions. As a result, this dissertation explores and presents SC-based DC-DC converter topologies, demonstrating superior power conversion efficiency and transient response, thereby addressing the growing need for high-performance, energy-efficient power delivery systems in both IoT and high-performance computing environments.
In the first research, a continuously scalable-conversion-ratio (CSCR) SC energy harvesting interface that extracts power from a thermoelectric generator (TEG), regulates a 0.75 V output load, and manages a 1.2–1.45 V battery is introduced. The structure employs the proposed CSCR SC converter to improve the power conversion efficiency up to 7.9% higher than that of the conventional converter. Moreover, the structure utilizes a proposed SC-based pulse frequency modulation (PFM) maximum power point tracking (MPPT) method to extract power from a TEG with an MPPT efficiency above 98.15%. Additionally, the proposed interface adopts a flying capacitor sharing scheme for the dual-mode operation of the SC interface to increase both the peak end-to-end efficiency and maximum output power. With a 180 nm CMOS process, the proposed interface achieves a peak end-to-end efficiency of 85.4% and maximum output power of 20.8 mW.
This dissertation also presents a four-phase time-based switched-capacitor low-dropout (SCLDO) regulator that regulates an output load voltage (VOUT) of 0.35–0.95 V with an input voltage (VIN) of 0.45–1 V. The regulator employs a four-phase time quantizer, which enables high proportional gain control and short transient response time with relatively low quiescent current. In addition, the proposed SCLDO employs a 9.6 pF coupling capacitor (CC) that is connected to the gate voltage of the pass transistor and VOUT node, thereby reducing the VOUT voltage drop during the load transition. Because the SCLDO utilizes capacitor components when charging and discharging CC, it provides robustness to process and temperature variations even at low-VIN conditions. Therefore, the proposed time-based SCLDO achieved a VOUT settling time of 4.4 ns at VIN = 1 V and 13 ns at VIN = 0.5 V condition. Fabricated in a 28 nm CMOS process, the proposed time-based SCLDO achieves a maximum IOUT of 400 mA and a novel figure of merit (FoM) of 11 ps, with an active area of 0.021 mm2.

목차 (Table of Contents)

• TABLE OF CONTENTS
• ABSTRACT i
• 국문 초록 iii
• TABLE OF CONTENTS vi
• LIST OF TABLES viii
• LIST OF FIGURES ix
• CHAPTER 1. INTRODUCTION 1
• 1.1 Research Background 1
• CHAPTER 2. A DUAL-MODE CSCR SC CONVERTER FOR ENERGY HARVESTING INTERFACE 3
• 2.1 Introduction 3
• 2.2 SC-Based PFM MPPT for the CSCR SC EH Interface 6
• 2.1.1 Prior Art 6
• 2.1.2 Proposed SC-Based PFM MPPT 7
• 2.3 Proposed Dual-Mode with FCS Scheme 10
• 2.4 System Architecture of the Proposed EH Interface and Circuit Details 13
• 2.4.1 Top Architecture 13
• 2.4.2 SC-Based PFM MPPT Circuit 14
• 2.4.3 Low-Power NOP Generation Circuit 16
• 2.4.4 Proposed Step-Up CSCR SC Converter 17
• 2.4.5 Reconfigurable SC PFM Controller 21
• 2.5 Measurement Results 24
• CHAPTER 3. A FOUR-PHASE TIME-BASED SWITCHED-CAPACITOR LDO 32
• 3.1 Introduction 32
• 3.2 Switched-Capacitor LDO 36
• 3.2.1 Prior Art 36
• 3.2.2 Proposed SCLDO 38
• 3.3 Four-Phase Time Quantizer 43
• 3.3.1 Prior Art 43
• 3.3.2 Proposed Four-Phase Time Quantizer 45
• 3.4 System Architecture 51
• 3.5 Measurement Results 53
• CHAPTER 4. CONCLUSION 60
• 4.1 A dual-mode CSCR SC converter for energy harvesting interface 60
• 4.2 A four-phase time-based switched-capacitor LDO 60
• 4.3 Final conclusion 60
• REFERENCES 61