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1 D. W. Chang, "VSSD : performance isolation in a solid-state drive" 20 (20): 51-, 2015
2 J. Kim, "Towards SLO Complying SSDs Through OPS Isolation" 183-189, 2015
3 J. S. Bucy, "The DiskSim simulation environment version 4.0 reference manual reference manual" Parallel Data Laboratory 2008
4 S. Hachiya, "TLC/MLC NAND flash mix-and-match design with exchangeable storage array" 894-895, 2013
5 Y. Zhang, "Self-Learning Disk Scheduling" 21 (21): 50-65, 2009
6 "SNIA IOTTA Repository"
7 V. Prabhakaran, "SD extension for DiskSim simulation environment"
8 S. M. Huang, "Providing SLO compliance on NVMe SSDs through parallelism reservation" 23 (23): 28-, 2018
9 C. A. Waldspurger, "Memory resource management in VMware ESX server" 36 (36): 181-, 2002
10 "MT29F4G08ABADAWP 8Gbit SLC NAND Flash Memory Data Sheet"
11 "K9GAG08U0M 2G x 8bit MLC NAND Flash Memory Data Sheet" Samsung Electronics
12 "I/O and search engine I/O. umass trace repository"
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15 S. Park, "FIOS : a fair, efficient flash I/O scheduler" 12 : 13-13, 2012
16 M. Yi, "Cffq: I/o scheduler for providing fairness and high performance in ssd devices" 87-, 2017
17 S. Iyer, "Anticipatory scheduling : A disk scheduling framework to overcome deceptive idleness in synchronous I/O" 35 (35): 117-130, 2001
18 김성호, "Analysis of Potential Risks for Garbage Collection and Wear Leveling Interference in FTL-based NAND Flash Memory" 한국컴퓨터정보학회 24 (24): 1-9, 2019
19 T. S. Chung, "A survey of flash translation layer" 332 (332): 332-343, 2009
20 D. Ma, "A survey of address translation technologies for flash memories" 46 (46): 36-, 2014
21 T. Garfinkel, "A Virtual Machine Introspection Based Architecture for Intrusion Detection" 3 (3): 191-206, 2003