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      저전력 NAND 플래시 메모리를 위한 필터 버퍼의 효율성 분석 = Analysis on the Effectiveness of the Filter Buffer for Low Power NAND Flash Memory

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      https://www.riss.kr/link?id=A101011903

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      다국어 초록 (Multilingual Abstract)

      Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.
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      Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high po...

      Currently, NAND Flash memory has been widely used in consumer storage devices due to its non-volatility, stability, economical feasibility, low power usage, durability, and high density. However, a high capacity of NAND flash memory causes the high power consumption and the low performance. In the convention memory research, a hierarchical filter mechanism can archive an effective performance improvement in terms of the power consumption. In order to attain the best filter structure for NAND flash memory, we selected a direct-mapped filter, a victim filter, a fully associative filter and a 4-way set associative filter for comparison in the performance analysis. According to the results of the simulation, the fully associative filter buffer with a 128byte fetching size can obtain the bet performance compared to another filter structures, and it can reduce the energy*delay product(EDP) by about 93% compared to the conventional NAND Flash memory.

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      참고문헌 (Reference)

      1 류준길, "로그기반 플래시 메모리 파일 시스템 성능 향상 기법" 대한임베디드공학회 2 (2): 184-193, 2007

      2 정보성, "다양한 메모리 셀을 결합한 디스크형 플래쉬 메모리 시스템" 대한임베디드공학회 4 (4): 134-138, 2009

      3 "http://www.samsung.com/sec/business/semico nductor/"

      4 "http://www.hpl.hp.com/research/cacti/"

      5 V. Mohan, "Flash Power: A Detailed Power Model for NAND Flash Memory" 502-507, 2010

      6 G. Abandah, "Evaluating Cache Power Dissipation using CACTI 5.3 simulator" University of Jordan 2010

      7 H.L. Li, "Energy-Aware Flash Memory management inVirtual Memory System" 16 (16): 457-467, 2008

      8 X. Jiang, "CHOP:Adaptive Filter Based DRAM Caching for CMP Server Platforms" 2010

      9 Y. Chan, "An Ultra Low-Power TLB Design" 1-6, 2006

      10 J.W. Parck, "A hybrid flash translation layer forSLC-MLC flash memory based multibanksolid state disk" 35 (35): 48-59, 2011

      1 류준길, "로그기반 플래시 메모리 파일 시스템 성능 향상 기법" 대한임베디드공학회 2 (2): 184-193, 2007

      2 정보성, "다양한 메모리 셀을 결합한 디스크형 플래쉬 메모리 시스템" 대한임베디드공학회 4 (4): 134-138, 2009

      3 "http://www.samsung.com/sec/business/semico nductor/"

      4 "http://www.hpl.hp.com/research/cacti/"

      5 V. Mohan, "Flash Power: A Detailed Power Model for NAND Flash Memory" 502-507, 2010

      6 G. Abandah, "Evaluating Cache Power Dissipation using CACTI 5.3 simulator" University of Jordan 2010

      7 H.L. Li, "Energy-Aware Flash Memory management inVirtual Memory System" 16 (16): 457-467, 2008

      8 X. Jiang, "CHOP:Adaptive Filter Based DRAM Caching for CMP Server Platforms" 2010

      9 Y. Chan, "An Ultra Low-Power TLB Design" 1-6, 2006

      10 J.W. Parck, "A hybrid flash translation layer forSLC-MLC flash memory based multibanksolid state disk" 35 (35): 48-59, 2011

      11 D. Jung, "A group-based wear-leveling algorithm forlarge-capacity flash memory storage system" 160-164, 2007

      12 G. Sun, "A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement" 1-12, 2010

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      학술지 이력

      학술지 이력
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      2014-07-03 학술지명변경 외국어명 : Journal of IEMEK -> IEMEK Journal of Embedded Systems and Applications KCI등재
      2012-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
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      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.27 0.27 0.22
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.22 0.18 0.415 0.07
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