We developed a novel shallow junction formation technique for SOI p-MOSFET application. A
poly boron lm (PBF) was used as the diusion source for a solid phase diusion (SPD) process.
Rapid thermal annealing (RTA) was utilized to diuse the boron from ...
We developed a novel shallow junction formation technique for SOI p-MOSFET application. A
poly boron lm (PBF) was used as the diusion source for a solid phase diusion (SPD) process.
Rapid thermal annealing (RTA) was utilized to diuse the boron from the PBF source. With the
advantages of the SPD technique, an extremely shallow p+-n junction less than 10 nm in depth was
formed and the p+-n-n+ diodes showed excellent junction properties. Based on optimized device
fabrication processes, SOI p-MOSFETs with a gate length of 35 nm were successfully fabricated
and revealed good electrical characteristics and superior device scalability.