상태 필드를 이용한 다중스레드 구조 = Multithreaded Architecture using Status Field

다국어 초록 (Multilingual Abstract)

In this paper, we have presented a high performance MULVEC (MULithreaded architecture for the VEctor Computations), as a building block of massively parallel processing systems. MULVEC comes from the synthesis of the dataflow computation model and the existing superscalar RISC microprocessor. MULVEC is composed of two processors: Vector memory control and Synchronization Processor (VSP) and Data Processor (DP). VSP manages and synchronizes datum, and DP computes datum.
MULVEC have made to reduce, using the packing method and a non-blocking mode, the number of messages, the length of a queue, the number of synchronizations and context switchings, and so on. The execution time and processor utilization are evaluated for the benchmark programs on SPARC V9 (superscalar 64-bit RISC microprocessor). The result of evaluation shows that the execution time of MULVEC is less than that of uniprocessor when the number of nodes of equal to or more than three.
Applications such as signal processing, image processing, and scientific computations require a lot of vector computations and they can be calculated efficiently using MULVEC.