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    KCI등재

    호지킨-헉슬리 모델을 위한 시냅스 기능을 지닌 신경세포 체인의 하드웨어 구현 = Hardware implementation of a pulse-type neuron chain with a synapse function for hodgkin-huxley model

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    https://www.riss.kr/link?id=A103745517

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    다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

    Integrated circuit of a new neuron chain with a synapse function for Hodgkin-Huxley model which is a good electrical model about a real biological neuron is implemented in a 0.5 μm 1 poly 2 metal CMOS technology. Pulse type neuron chain consist of series connected current controlled single neurons through synapses. For the realization of the single neuron, a pair of voltage mode oscillators using operational transconductance amplifiers and capacitors is used. The synapse block which is a connection element between neurons consist of a voltage-current conversion circuit using current
    mirror. SPICE simulation results of the proposed circuit show 160 mV amplitude pulse output and propagation of the signal through synapses. Measurements of the fabricated pulse type neuron chip in condition of ±2.5 V power supply are shown and compared with the simulated results.
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    Integrated circuit of a new neuron chain with a synapse function for Hodgkin-Huxley model which is a good electrical model about a real biological neuron is implemented in a 0.5 μm 1 poly 2 metal CMOS technology. Pulse type neuron chain consist of se...

    Integrated circuit of a new neuron chain with a synapse function for Hodgkin-Huxley model which is a good electrical model about a real biological neuron is implemented in a 0.5 μm 1 poly 2 metal CMOS technology. Pulse type neuron chain consist of series connected current controlled single neurons through synapses. For the realization of the single neuron, a pair of voltage mode oscillators using operational transconductance amplifiers and capacitors is used. The synapse block which is a connection element between neurons consist of a voltage-current conversion circuit using current
    mirror. SPICE simulation results of the proposed circuit show 160 mV amplitude pulse output and propagation of the signal through synapses. Measurements of the fabricated pulse type neuron chip in condition of ±2.5 V power supply are shown and compared with the simulated results.

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    참고문헌 (Reference)

    1 K. Judd, "Pulse propagation networks: A neural network model thal uses temporal coding by action potentials" 6 (6): 203-218, 1993

    2 D. Terman, "Global competition and local cooperation in a network of neural" 81 : 148-176, 1995

    3 W. J. Freeman, "Central pattern generating and recognizing in olfactory bulb: A correlation learning rule" 1 : 227-288, 1988

    4 Y. Ota, "CMOS implementation of a pulse-coded neural network with a current controlled oscillator" 410-413, 1996

    5 G. Moon, "CMOS design of pulse coded adaptive neural processing element using neural-type cells" 2224-2227, 1992

    6 B. Linares-Barranco, "CMOS analog neural network systems based on oscillatory neurons" 2236-2239, 1992

    7 Y. Ota, "Analog implementation of pluse-coupled neural" 10 (10): 539-544, 1999

    8 C. Mead, "Analog VLSI and neural systems" Addison- wesley publishing company 1989

    9 T. Taniguchi, "An IC implementation of asynchronous pulse neuron model : in Roc" 921-924, 2002

    10 V. M. G. Tavares, "A silicon olfactory bulb oscillator" 410-413, 2000

    1 K. Judd, "Pulse propagation networks: A neural network model thal uses temporal coding by action potentials" 6 (6): 203-218, 1993

    2 D. Terman, "Global competition and local cooperation in a network of neural" 81 : 148-176, 1995

    3 W. J. Freeman, "Central pattern generating and recognizing in olfactory bulb: A correlation learning rule" 1 : 227-288, 1988

    4 Y. Ota, "CMOS implementation of a pulse-coded neural network with a current controlled oscillator" 410-413, 1996

    5 G. Moon, "CMOS design of pulse coded adaptive neural processing element using neural-type cells" 2224-2227, 1992

    6 B. Linares-Barranco, "CMOS analog neural network systems based on oscillatory neurons" 2236-2239, 1992

    7 Y. Ota, "Analog implementation of pluse-coupled neural" 10 (10): 539-544, 1999

    8 C. Mead, "Analog VLSI and neural systems" Addison- wesley publishing company 1989

    9 T. Taniguchi, "An IC implementation of asynchronous pulse neuron model : in Roc" 921-924, 2002

    10 V. M. G. Tavares, "A silicon olfactory bulb oscillator" 410-413, 2000

    11 A. L. Hodgkin, "A quantitative description of memtrane current and its application to conduction and excitation in nerve" 117 : 500-544, 1952

    12 B. Liu, "A CMOS neuron for VLSI circuit implementation of pulsed neural networks" 4 (4): 3182-3185, 2002

    13 H. J. Song, "A CMOS neural oscillator using negative resistance" 152-155, 2003

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    유사연구자 (20) 활용도상위20명

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    학술지 이력

    학술지 이력
    연월일 이력구분 이력상세 등재구분
    2022 평가 계속평가 신청대상 (계속평가)
    2021-12-01 등재 등재후보로 하락 (재인증) KCI등재후보
    2018-01-01 등재 등재학술지 선정 (계속평가) KCI등재
    2017-12-01 등재 등재후보로 하락 (계속평가) KCI등재후보
    2013-01-01 등재 등재 1차 FAIL (등재유지) KCI등재
    2010-01-01 등재 등재학술지 유지 (등재유지) KCI등재
    2008-01-01 등재 등재학술지 유지 (등재유지) KCI등재
    2005-01-01 등재 등재학술지 선정 (등재후보2차) KCI등재
    2004-01-01 등재 등재후보 1차 PASS (등재후보1차) KCI등재후보
    2002-07-01 등재 등재후보학술지 선정 (신규평가) KCI등재후보
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    학술지 인용정보

    학술지 인용정보
    기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
    2016 0.22 0.22 0.16
    KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
    0.15 0.13 0.319 0.07
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