RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      KCI등재후보

      3D IC 열관리를 위한 TSV Liquid Cooling System = TSV Liquid Cooling System for 3D Integrated Circuits

      한글로보기

      https://www.riss.kr/link?id=A101205223

      • 0

        상세조회
      • 0

        다운로드
      서지정보 열기
      • 내보내기
      • 내책장담기
      • 공유하기
      • 오류접수

      부가정보

      다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

      3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is considered as one of key technologies to resolve a device scaling issue between transistor and packaging. However, despite of many advantages, 3D IC technology suffers from power delivery, thermal management, manufacturing yield, and device test. Especially for high density and high performance devices, power density increases significantly and it results in a major thermal problem in stacked ICs. In this paper, the recent studies of TSV liquid cooling system has been reviewed as one of device cooling methods for the next generation thermal management.
      번역하기

      3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is consider...

      3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is considered as one of key technologies to resolve a device scaling issue between transistor and packaging. However, despite of many advantages, 3D IC technology suffers from power delivery, thermal management, manufacturing yield, and device test. Especially for high density and high performance devices, power density increases significantly and it results in a major thermal problem in stacked ICs. In this paper, the recent studies of TSV liquid cooling system has been reviewed as one of device cooling methods for the next generation thermal management.

      더보기

      참고문헌 (Reference)

      1 "http://www.itrs.net"

      2 E. Kim, "Yield Challenges in Wafer Stacking Technology" 48 : 1102-, 2008

      3 J. Balachandran, "Wafer-Level Package Interconnect Options" 14 (14): 654-, 2006

      4 Y. Kim, "Wafer Warpage Analysis of Stacked Wafers for 3D Integration" 89 : 46-, 2012

      5 H. Mizunuma, "Thermal Modeling for 3D-ICs with Integrated Microchannel Cooling" 256-, 2009

      6 Y. Wei, "Stacked Microchannel Heat Sinks for Liquid Cooling of Microelectronic Components" 126 : 60-, 2004

      7 B. Dang, "Revolutionary Nanosilicon Ancillary Technologies for Ultimate-Performance Gigascale Systems" 2007

      8 G. Huang, "Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication" 205-, 2007

      9 김은경, "Overview of High Performance 3D-WLP" 한국재료학회 17 (17): 371-375, 2007

      10 H. Oprins, "On-chip Liquid Cooling with Integrated Pump Technology" 30 (30): 209-, 2007

      1 "http://www.itrs.net"

      2 E. Kim, "Yield Challenges in Wafer Stacking Technology" 48 : 1102-, 2008

      3 J. Balachandran, "Wafer-Level Package Interconnect Options" 14 (14): 654-, 2006

      4 Y. Kim, "Wafer Warpage Analysis of Stacked Wafers for 3D Integration" 89 : 46-, 2012

      5 H. Mizunuma, "Thermal Modeling for 3D-ICs with Integrated Microchannel Cooling" 256-, 2009

      6 Y. Wei, "Stacked Microchannel Heat Sinks for Liquid Cooling of Microelectronic Components" 126 : 60-, 2004

      7 B. Dang, "Revolutionary Nanosilicon Ancillary Technologies for Ultimate-Performance Gigascale Systems" 2007

      8 G. Huang, "Power Delivery for 3D Chip Stacks: Physical Modeling and Design Implication" 205-, 2007

      9 김은경, "Overview of High Performance 3D-WLP" 한국재료학회 17 (17): 371-375, 2007

      10 H. Oprins, "On-chip Liquid Cooling with Integrated Pump Technology" 30 (30): 209-, 2007

      11 S. N. Paisner, "Nanotechnology and Mathematical Methods for High-Performance Thermal Interface Materials" Global SMT & Packag 36-, 2008

      12 R. Hon, "Multi-Stack Flip Chip 3D Packaging with Copper Plated Through-Silicon Vertical Interconnection" 384-, 2005

      13 G. Upadhya, "Micro-Scale Liquid Cooling System for High Heat Flux Processor Cooling Applications" 116-, 2006

      14 J. Lee, "Low-Temperature Two-Phase Microchannel Cooling for High-Heat-Flux Thermal Management of Defense Electronics" 32 (32): 453-, 2009

      15 T. Brunschwiler, "Interlayer Cooling Potential in Vertically Integrated Packages" 15 : 57-, 2009

      16 B. Dang, "Integrated Thermal- Fluidic I/O Interconnects for an On-Chip Microchannel Heat Sink" 27 : 117-, 2006

      17 G. Y. Tang, "Integrated Liquid Cooling Systems for 3-D Stacked TSV Modules" 33 (33): 184-, 2010

      18 B. Shi, "Hybrid 3D-IC Cooling System Using Micro-fluidic Cooling and Thermal TSVs" 33-, 2012

      19 J. W. Joyner, "Global Interconnect Design in a Three-Dimensional System-on-a-Chip" 12 : 367-, 2004

      20 J. Li, "Geometric Optimization of a Micro Heat Sink with Liquid Flow" 29 (29): 145-, 2006

      21 T. G. Yue, "Fluidic Interconnects in Integrated Liquid Cooling Systems for 3-D Stacked TSV Modules" 2008

      22 T. Chen, "Flow Boiling Heat Transfer to a Dielectric Coolant in a Microchannel Heat Sink" 30 (30): 24-, 2007

      23 A. Yu, "Fabrication of Silicon Carriers with TSV Electrical Interconnections and Embedded Thermal Solutions for High Power 3-D Package" 2008

      24 P. S. Lee, "Experimental Study on Laminar Heat Transfer in Microchannel Heat Sink" 379-, 2002

      25 G. G. Shahidi, "Evolution of CMOS Technology at 32 nm and Beyond" 2007

      26 Jun Xu, "Enhancement of Thermal Interface Materials with Carbon Nanotube Arrays" 49 (49): 1658-, 2006

      27 J. H. Lau, "Effects of TSVs (Through-Silicon Vias) on Thermal Performances of 3D IC Integration System- In-Package (SiP)" 52 : 2660-, 2012

      28 Y. M. Hung, "Effects of Geometric Design on Thermal Performance of Star-Groove Micro-Heat Pipes" 54 (54): 1198-, 2011

      29 J. Darabi, "Development of a Chip-Integrated Micro Cooling Device" 34 (34): 1067-, 2003

      30 H. Y. Zhang, "Development of Liquid Cooling Techniques for Flip Chip Ball Grid Array Packages with High Flux Heat Dissipations" 28 (28): 127-, 2005

      31 Y. Zhang, "Coupled Electrical and Thermal 3D IC Centric Microfluidic Heat Sink Design and Technology" 2011

      32 A. Hamdan, "Characterization of a Liquid-Metal Microdroplet Thermal Interface Material" 35 (35): 1250-, 2011

      33 A. J. McNamara, "Characterization of Nanostructured Thermal Interface Materials: A Review" 62 : 2-, 2011

      34 J. Vaes, "Challenges of Copper Through Silicon Via (TSV) Metallization for 3D-Stacked IC Integration" 88 (88): 745-, 2011

      35 S. C. Mohapatra, "Advances in Liquid Coolant Technologies for Electronics Cooling" 354-, 2005

      36 D. Kearney, "A Liquid Cooling Solution for Temperature Redistribution in 3D IC Architectures" 43 (43): 602-, 2012

      37 D. Sekar, "A 3D-IC Technology with Integrated Microchannel Cooling" 13-, 2008

      38 R. S. List, "3D Wafer Stacking Technology" 18 : 29-, 2002

      39 M. Bakir, "3D Heterogeneous Integrated Systems: Liquid Cooling, Power Delivery, and Implementation" 2008

      40 N. Khan, "3-D Packaging With Through- Silicon Via (TSV) for Electrical and Fluidic Interconnections" 3 (3): 221-, 2013

      더보기

      동일학술지(권/호) 다른 논문

      동일학술지 더보기

      더보기

      분석정보

      View

      상세정보조회

      0

      Usage

      원문다운로드

      0

      대출신청

      0

      복사신청

      0

      EDDS신청

      0

      동일 주제 내 활용도 TOP

      더보기

      주제

      연도별 연구동향

      연도별 활용동향

      연관논문

      연구자 네트워크맵

      공동연구자 (7)

      유사연구자 (20) 활용도상위20명

      인용정보 인용지수 설명보기

      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2022 평가예정 계속평가 신청대상 (계속평가)
      2021-12-01 평가 등재후보로 하락 (재인증) KCI등재후보
      2018-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2015-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2011-06-28 학술지명변경 한글명 : 마이크전자 및 패키징학회지 -> 마이크로전자 및 패키징학회지
      외국어명 : The Microelectronics and Packaging Society -> Jornal of the Microelectronics and Packaging Society
      KCI등재
      2011-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2009-01-01 평가 등재 1차 FAIL (등재유지) KCI등재
      2007-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2004-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
      2003-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2001-07-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
      더보기

      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.48 0.48 0.43
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.39 0.35 0.299 0.35
      더보기

      이 자료와 함께 이용한 RISS 자료

      나만을 위한 추천자료

      해외이동버튼