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      전압비교기를 이용한 AB급 연산증폭기의 슬루율 개선에 관한 연구 = A study on the slew rate improvement of class AB operational amplifier using voltage comparator

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      https://www.riss.kr/link?id=A101794925

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      In this paper, we introduce a circuit which has improved power consumption and slew rate by adding a voltage comparator on the structure of the class AB rail to rail folded cascode OP amplifier. Using a voltage comparator, bias voltage near to VDD is applied in charging and discharging time and so high voltage is transferred to the output load. Therefore, proposed class AB rail to rail folded cascode OP amplifier circuit has high slew rate and low power consumption. From the simulation results of slew rate, we know that slew rate of proposed circuit is improved from 2.5V/us to 12V/us comparing to the conventional circuit. That is the reason why voltage comparator transmits voltage near to the value of VDD to the load stage. From the simulation results of power consumption, we know that power consumption of proposed circuit is improved from 1.2mW to 0.5mW comparing to the conventional circuit. Proposed class AB rail to rail folded cascode OP amplifier is designed and simulated by using the TSMC 0.18um 1-Poly & 6-Metal CMOS process.
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      In this paper, we introduce a circuit which has improved power consumption and slew rate by adding a voltage comparator on the structure of the class AB rail to rail folded cascode OP amplifier. Using a voltage comparator, bias voltage near to VDD is ...

      In this paper, we introduce a circuit which has improved power consumption and slew rate by adding a voltage comparator on the structure of the class AB rail to rail folded cascode OP amplifier. Using a voltage comparator, bias voltage near to VDD is applied in charging and discharging time and so high voltage is transferred to the output load. Therefore, proposed class AB rail to rail folded cascode OP amplifier circuit has high slew rate and low power consumption. From the simulation results of slew rate, we know that slew rate of proposed circuit is improved from 2.5V/us to 12V/us comparing to the conventional circuit. That is the reason why voltage comparator transmits voltage near to the value of VDD to the load stage. From the simulation results of power consumption, we know that power consumption of proposed circuit is improved from 1.2mW to 0.5mW comparing to the conventional circuit. Proposed class AB rail to rail folded cascode OP amplifier is designed and simulated by using the TSMC 0.18um 1-Poly & 6-Metal CMOS process.

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