Indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs) have attracted considerable attention for next-generation memory applications owing to the excellent properties of IGZO as a channel material, including ultra-low off state current, h...

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https://www.riss.kr/link?id=T17416658
포항 : 포항공과대학교 반도체대학원, 2026
2026
영어
경상북도
55 ; 26 cm
지도교수: Byoung Hun Lee
I804:47020-200000959815
0
상세조회0
다운로드다국어 초록 (Multilingual Abstract)
Indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs) have attracted considerable attention for next-generation memory applications owing to the excellent properties of IGZO as a channel material, including ultra-low off state current, h...
Indium–gallium–zinc–oxide (IGZO) thin-film transistors (TFTs) have attracted considerable attention for next-generation memory applications owing to the excellent properties of IGZO as a channel material, including ultra-low off state current, high electron mobility, and BEOL- compatible low temperature processing. However, as device dimensions continue to scale down, contact resistance increasingly dominates the total device resistance, severely limiting current drivability. Unlike Si-based MOSFETs, conventional contact engineering approaches, such as silicide formation, are not applicable to oxide semiconductor TFTs, necessitating alternative strategies for contact resistance reduction. In this study, the insertion of an indium tin oxide (ITO) interlayer at the metal/IGZO interface was investigated to improve contact properties. Considering that contact resistance in IGZO TFTs mainly originates from the Schottky barrier and interfacial oxide layers, an ITO interlayer was introduced to mitigate these factors. In direct Mo/IGZO contacts, the strong oxygen reactivity of the metal results in pronounced interfacial oxide layers, leading to increased contact resistance. In contrast, as a conductive metal oxide, ITO does not introduce additional interfacial oxide layers at the ITO/IGZO interface, thereby avoiding the formation of an extra tunneling barrier. Furthermore, the ITO interlayer does not induce direct oxygen vacancy formation in the IGZO channel, which is beneficial for channel reliability. Transmission line method (TLM) analysis revealed that the specific contact resistivity was reduced from 8.8×10⁻³ Ω·cm² for devices without an interlayer to 3.2×10⁻⁵ Ω·cm² when a 2 nm- thick ITO interlayer was optimally inserted, corresponding to an improvement of more than two orders of magnitude. As a result of the improved contact properties, the drain current increased from 3.8 × 10⁻³ μA/μm for devices without an interlayer to 6.9 × 10⁻³ μA/μm at a gate overdrive voltage of 1V, confirming a substantial enhancement in on-state performance. X-ray photoelectron spectroscopy (XPS) analysis further indicated that the insertion of the ITO interlayer did not induce a significant change in oxygen vacancy concentration at the IGZO interface, supporting the absence of direct channel degradation. In addition to TLM analysis, the extracted contact resistivity was cross-verified using a 1/VOV method. These results demonstrate an effective contact engineering strategy for IGZO TFTs and highlight their potential applicability to next-generation memory devices, including vertical channel transistor DRAM (VCT DRAM) and two transistor zero capacitor (2T-0C) DRAM architectures.
목차 (Table of Contents)