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    Improvement of Thermal Stability of Nickel Silicide Using Co-sputtering of Ni and Ti for Nano-Scale CMOS Technology

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    https://www.riss.kr/link?id=A99655096

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    다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

    In this paper, a thermally stable nickel silicide technology using the co-sputtering of nickel and titanium atoms capped with TiN layer is proposed for nano-scale metal oxide semiconductor field effect transistor (MOSFET) applications. The effects of the incorporation of titanium ingredient in the co-sputtered Ni layer are characterized as a function of Ti sputtering power. The difference between the one-step rapid thermal process (RTP) and two-step RTP for the silicidation process has also been studied. It is shown that a certain proportion of titanium incorporation with two-step RTP has the best thermal stability for this structure.
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    In this paper, a thermally stable nickel silicide technology using the co-sputtering of nickel and titanium atoms capped with TiN layer is proposed for nano-scale metal oxide semiconductor field effect transistor (MOSFET) applications. The effects of ...

    In this paper, a thermally stable nickel silicide technology using the co-sputtering of nickel and titanium atoms capped with TiN layer is proposed for nano-scale metal oxide semiconductor field effect transistor (MOSFET) applications. The effects of the incorporation of titanium ingredient in the co-sputtered Ni layer are characterized as a function of Ti sputtering power. The difference between the one-step rapid thermal process (RTP) and two-step RTP for the silicidation process has also been studied. It is shown that a certain proportion of titanium incorporation with two-step RTP has the best thermal stability for this structure.

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    목차 (Table of Contents)

    • Abstract
    • Ⅰ. INTRODUCTION
    • Ⅱ. EXPERIMENTAL
    • Ⅲ. RESULTS AND DISCUSSIONS
    • Ⅳ. CONCLUSIONS
    • Abstract
    • Ⅰ. INTRODUCTION
    • Ⅱ. EXPERIMENTAL
    • Ⅲ. RESULTS AND DISCUSSIONS
    • Ⅳ. CONCLUSIONS
    • REFERENCES
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    참고문헌 (Reference)

    1 C. Lavoie, "Towards implementation of a nickel silicide process for CMOS technologies" 70 (70): 144-157, 2003

    2 M. C. Poon, "Thermal stability of cobalt and nickel silicides" 38 (38): 1495-1498, 1998

    3 Y. J. Kim, "The Effect of Triple Capping Layer (Ti/Ni/TiN) on the Electrical and Structural Properties of Nickel Monosilicide" 153 (153): 35-38, 2006

    4 H. Iwai, "NiSi salicide technology for scaled CMOS" 60 (60): 157-169, 2002

    5 신홍식, "Improvement of Thermal Stability of Ni-Silicide Using Vacuum Annealing on Boron Cluster Implanted Ultra Shallow Source/Drain for Nano-Scale CMOSFETs" 대한전자공학회 10 (10): 260-264, 2010

    6 J. G. Yun, "Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer" 26 (26): 90-92, 2005

    7 D. Deduytsche, "Formation and morphological stability of NiSi in the presence of W, Ti, and Ta alloying elements" 101 (101): 044508-, 2007

    8 C. J Choi, "Effects of a SiO2 Capping Layer on the Electrical Properties and Morphology of Nickel Silicides" 41 (41): 1969-1973, 2002

    9 S. L. Chiu, "Effects of Ti Interlayer on Ni/Si Reaction Systems" 151 (151): 452-455, 2004

    10 R. T. P. Lee, "Effects of Ti Incorporation in Ni on Silicidation Reaction and Structural/Electrical Properties of NiSi" 151 (151): 642-647, 2004

    1 C. Lavoie, "Towards implementation of a nickel silicide process for CMOS technologies" 70 (70): 144-157, 2003

    2 M. C. Poon, "Thermal stability of cobalt and nickel silicides" 38 (38): 1495-1498, 1998

    3 Y. J. Kim, "The Effect of Triple Capping Layer (Ti/Ni/TiN) on the Electrical and Structural Properties of Nickel Monosilicide" 153 (153): 35-38, 2006

    4 H. Iwai, "NiSi salicide technology for scaled CMOS" 60 (60): 157-169, 2002

    5 신홍식, "Improvement of Thermal Stability of Ni-Silicide Using Vacuum Annealing on Boron Cluster Implanted Ultra Shallow Source/Drain for Nano-Scale CMOSFETs" 대한전자공학회 10 (10): 260-264, 2010

    6 J. G. Yun, "Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer" 26 (26): 90-92, 2005

    7 D. Deduytsche, "Formation and morphological stability of NiSi in the presence of W, Ti, and Ta alloying elements" 101 (101): 044508-, 2007

    8 C. J Choi, "Effects of a SiO2 Capping Layer on the Electrical Properties and Morphology of Nickel Silicides" 41 (41): 1969-1973, 2002

    9 S. L. Chiu, "Effects of Ti Interlayer on Ni/Si Reaction Systems" 151 (151): 452-455, 2004

    10 R. T. P. Lee, "Effects of Ti Incorporation in Ni on Silicidation Reaction and Structural/Electrical Properties of NiSi" 151 (151): 642-647, 2004

    11 Jung Soon-Yen, "Characterization of the Dopant Dependence of Ni-Silicide on a SOI Substrate for a Nano-Scale CMOSFET" 한국물리학회 50 (50): 1883-1886, 2007

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    연월일 이력구분 이력상세 등재구분
    2023 평가 해외DB학술지평가 신청대상 (해외등재 학술지 평가)
    2020-01-01 등재 등재학술지 유지 (해외등재 학술지 평가) KCI등재
    2014-01-21 학회명변경 영문명 : The Institute Of Electronics Engineers Of Korea -> The Institute of Electronics and Information Engineers KCI등재
    2010-11-25 학술지명변경 한글명 : JOURNAL OF SEMICONDUTOR TECHNOLOGY AND SCIENCE -> JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE KCI등재
    2010-01-01 등재 등재학술지 선정 (등재후보2차) KCI등재
    2009-01-01 등재 등재후보 1차 PASS (등재후보1차) KCI등재후보
    2007-01-01 등재 등재후보학술지 선정 (신규평가) KCI등재후보
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    기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
    2016 0.42 0.13 0.35
    KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
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