Dual-Buck Power Converters with Enhanced System Reliability and Efficiency : 고 신뢰성, 고효율 듀얼 벅 파워 컨버터

국문 초록 (Abstract)

고 신뢰성, 고효율 듀얼 벅 파워 컨버터

아쉬라프 알리 칸

경북대학교 건설 환경 에너지 공학부환경 에너지 공학 전공
(지도교수: 차헌녕)

(초록)
기존의 양방향 컨버터의 대부분은 안정성에 문제가 되는 슛-쓰루 (shoot-through) 위험성을 가지고 있다. 슛-쓰루 (shoot-through) 문제를 피하고 안정성을 높이기 위해 데드 타임이 게이트 신호 사이에 삽입된다. 하지만 데드 타임은 전압 이득을 줄이고 효율을 감소 시켜 컨버터의 성능을 떨어트린다. 또한 이는 제어 능력을 떨어트리고 출력 파형을 왜곡 시키며 스위칭 주파수를 제한한다.
전력 변환기는 일반적으로 MOSFET과 IGBT를 스위치 소자로 사용한다. MOSFET은 IGBT보다 빠른 스위칭, 낮은 스위칭 손실 및 전압 강하 특징을 갖는다. 이러한 특징 때문에 MOSGET은 고주파 스위칭이 필요한 전력 변환기에 적합하다. 고주파 스위칭은 전력변환기의 수동 부품 양을 줄이고 효율을 향상시킬 수 있다. 그러나 하드 스위칭하거나 버스 전압이 높은 경우 MOSFET의 바디 다이오드는 역 회복 문제를 갖는다. 따라서 버스 전압이 높은 상태에서 하드 스위칭을 하는 기존의 컨버터는 일반적으로 MOSFET을 스위치 소자로 쓰는 것을 권장하지 않는다. 본 논문은 듀얼 벅 컨버터 라 불리는 하드 스위칭 컨버터를 제안한다. 이는 슛-쓰루 (shoot-through) 위험성을 제거하여 높은 신뢰성을 달성하고 MOSFET 바디 다이오드의 역 회복 문제를 제거하여 효율을 향상시켰다.
넓은 범위의 입력 전압을 가진 채 출력 AC 전압을 조절하기 위해서는 벅-부스트 전력 시스템이 필요하다. 본 논문은 1단 2-레벨 벅-부스트 인버터를 제안한다. 제안한 인버터는 슛-쓰루 (shoot-through) 문제가 없어 시스템 신뢰성이 향상되었으며 파워 MOSFET을 사용하여 효율을 높였다. 광범위한 전압이득 구간을 가지고 있으며 출력 AC 파형을 왜곡 없이 얻을 수 있기 때문에 게이트 신호의 데드 타임을 없앨 수 있다. 제안한 1단 벅-부스트 인버터의 효율과 안정성을 더욱 향상시키기 위해 저주파와 고주파 변조를 결합한 PWM 이 본 논문에서 제안된다.
고전압 민 고전력dc-ac 전력 변환에서 2-레벨 인버터는 잘 사용되지 않는다. 고전압 및 고전력 전력변환을 위해 다중 레벨 인버터가 대안으로 발전해왔다. 본 논문은 새로운 방식의 캐스케이드 및 중앙 포인트 클램핑 멀티 레벨 인버터를 제안한다. 이는 왜곡이 적은 출력 AC 전압을 생성 할 수 있다. 또한 제안한 멀티 레벨 인버터는 저전압 정격을 가진 소자로 높은 출력 AC 전압을 얻을 수 있으며 스위칭 주파수를 줄일 수 있다. 게다가 이 또한 슛-스루 (shoot-through)와 MOSFET바디 다이오드의 역 회복 문제가 없다.
일반적으로 인버터는 DC-AC 전력 변환에 사용되며 AC-AC 컨버터는 AC-AC 전력 변환에 사용된다. 전통적인 AC-AC 컨버터는 정류 문제를 가지고 있어 실제로 어플리케이션에 적용하기가 어렵다. 본 논문은 새로운 유형의 2단 단상, 3 상 및 다단 계단식 AC-AC 컨버터를 제안한다. 이들은 슛-스루와 데드 타임 관련 문제가 없다. 또한 RC 스너버를 사용하거나 소프트 정류 방법을 이용하는 전통적인 방법을 하지 않아도 안전한 정류를 할 수 있다. 게다가 이들은 출력전압 왜곡이 거의 없으며, 바디 다이오드의 역 회복 문제 또한 없기 때문에 파워 MOSFET을 사용하여 높은 효율을 가질 수 있다. 고전압 AC-AC 전력 변환을 위해, 위상 변환 제어를 하는 새로운 계단식 AC-AC 전력 변환기가 본 논문에 소개된다. 이는 저전압 정격 반도체 소자를 사용하여 고출력 AC 전압을 생성 할 수 있다. 위상 변환 제어는 컨버터의 스위칭 주파수를 캐스케이드 단위만큼 증가시킨다.
본 논문은 제안한 컨버터의 스위칭 전략과 상세한 이론 분석 및 설계 지침을 설명한다. 제안한 회로의 특징을 확인하기 위해 다양한 시제품이 제작되고 테스트되었다.

다국어 초록 (Multilingual Abstract)

Abstract
Dual-Buck Power Converters with Enhanced System Reliability and Efficiency
By
Ashraf Ali Khan

Most of the conventional bidirectional converters have shoot-through risk, which is a major reliability issue. To avoid the shoot-through, finite dead-time is inserted between the switches. The dead-time guarantees safe operation. However, it adversely affects the performance of the converter. The dead-time reduces the voltage gain, reduces efficiency, decreases controllability, distorts the output waveforms, and limits the switching frequencies.
In power converters, MOSFET and IGBT are commonly used as switching devices. In comparison with IGBT, MOSFET has fast switching, low switching loss and resistive conduction voltage drop. These features make MOSFET attractive in power converters for high frequency switching to reduce the volume of passive components by increasing switching frequency and to improve efficiency. However, the body diode of MOSFET has poor reverse recovery characteristics which cause reverse recovery issues during hard switching and when the bus voltage is high. Therefore, in the conventional hard switching converters at high bus voltage, MOSFETs are normally not recommended for switching.
In this thesis hard switching converters called dual-buck converters are proposed to attain high reliability by eliminating shoot-through risk, and improve efficiency by utilizing MOSFETs without reverse recovery issues of their body diodes.
A buck-boost power conditioning system is required to regulate the output ac voltage for wide range input dc voltage variation. This dissertation proposes single-stage two-level buck-boost inverters. Compared to the conventional single-stage buck-boost inverters, the proposed inverters have enhanced system reliability due to no shoot-through issues, and can increase the efficiency by using power MOSFETs. They can eliminate the dead-time in gate signals, owing to which the obtainable voltage gain can be reached and the output ac waveforms can be obtained with less distortion. To further improve the efficiency and stability of the proposed single-stage buck-boost inverters, PWM strategies combining the low and high frequency modulations are proposed.
In high-voltage and high dc-ac power conversion, the two-level inverters can be hardly used. For this purpose, multilevel inverters have evolved as a viable solution. This dissertation proposes new type of cascaded and neutral point clamped multilevel inverters. They can generate an output ac voltage with low distortion. In addition, a high output ac voltage can be obtained with standard low voltage rating devices. Furthermore, they can reduce the switching frequencies. Besides, the proposed multilevel inverters have no shoot-through issues and can utilize power MOSEFTs without reverse recovery issues of their body diodes.
Inverters are normally used for dc-ac power conversion, and ac-ac converters are used for ac-ac power conversion. The direct ac-ac converters are used for applications that require only voltage or power regulation. The traditional direct ac-ac converters have commutation problem which limits their practical implementation. This dissertation proposes new type two-level single-phase, three-phase and multilevel cascaded direct ac-ac converters. They have no shoot-through and dead-time related problems, and they can achieve safe commutation without employing the traditional techniques of using RC snubbers and employing soft commutation strategies. Further, they produce output voltages with extremely low distortion, and they can attain high efficiency by utilizing power MOSFETs without reverse recovery issues of their body diodes. To work with high voltage and high ac-ac power conversion, new type cascaded ac-ac power converters with phase-shift control are proposed in this dissertation. It can generate a high output ac voltage using standard low voltage rating semiconductor devices. The phase shift control increases the switching frequency of the converter by the number of cascaded units.
The switching strategies for the proposed converters are developed, and detailed theoretical analysis and design guidelines of the proposed topologies are presented. To verify the performance and effectiveness of the proposed topologies, various laboratory prototypes are fabricated and tested.

목차 (Table of Contents)

• List of Figures xiii
• List of Tables xxi
• Chapter 1. Introduction 1
• 1.1 Background 1
• 1.1.1 2L single-stage buck-boost dc-ac inverters 1
• 1.1.2 Multilevel dc-ac inverters 2
• 1.1.3 2L direct ac-ac converters 4
• 1.1.4 Multilevel direct ac-ac converters 5
• 1.2 Benefits and Limitations of Traditional Converters 7
• 1.3 Dual-Buck Structure 10
• 1.4 Literature Review and Research Motivations and Objectives 12
• 1.4.1 2L direct ac-ac converters 12
• 1.4.2 Multilevel direct ac-ac converters 13
• 1.4.3 2L single-stage buck-boost dc-ac inverters 15
• 1.4.4 Multilevel cascaded dc-ac inverters 17
• 1.4.5 Multilevel neutral point clamped inverter 18
• 1.5 Dissertation Outline 18
• Chapter 2. Single-Phase AC-AC Converters 21
• 2.1 Conventional Single-Phase AC-AC Converters 21
• 2.2 Proposed Single-Phase AC-AC Converters 22
• 2.3 Operation of the Proposed Boost AC-AC Converter 24
• 2.3.1 Mode1 24
• 2.3.2 Mode2 25
• 2.3.3 Operation in dead-time 27
• 2.3.4 Operation in overlap time 27
• 2.4 Inductor Design and Component Selection 28
• 2.4.1 Inductor design 28
• 2.4.2 Voltage stress of switches 28
• 2.4.3 Current stress of switches 29
• 2.5 Experimental Results 29
• 2.6 Summary 34
• Chapter 3. Single-Phase Buck-Boost AC-AC Converter with Less Inductors 35
• 3.1 Conventional Single-Phase Buck-Boost Converters 35
• 3.2 Proposed Single-Phase Buck-Boost AC-AC Converter 39
• 3.3 PWM Strategies 39
• 3.4 Operation with Complementary PWM Strategy 41
• 3.4.1 Mode 1 41
• 3.4.2 Mode 2 42
• 3.5 Operation with Interleaved PWM Strategy 43
• 3.5.1 Mode 1 43
• 3.5.2 Mode 2 43
• 3.5.3 Mode 3 44
• 3.5.4 Mode 4 44
• 3.6 Parameter Design of the Proposed Converter 44
• 3.6.1 Switch voltage and current stress 44
• 3.6.2 Inductor current ripple 44
• 3.6.3 Design of leg capacitors 46
• 3.6.4 Control block diagram 46
• 3.7 Experimental Results 48
• 3.8 Summary 54
• Chapter 4. Three-Phase AC-AC Converters Using Coupled Inductors 55
• 4.1 Traditional Direct PWM Three-Phase AC-AC Converters 55
• 4.2 Proposed Direct PWM Three-Phase AC-AC Converters 57
• 4.3 Analysis and Operation of the Proposed Converters 60
• 4.3.1 Mode 1 62
• 4.3.2 Mode 2 62
• 4.3.3 Mode 3 62
• 4.3.4 Mode 4 63
• 4.4 Current Ripple Analysis of Inductors 63
• 4.4.1 Input inductor 63
• 4.4.2 Coupled inductor 64
• 4.5 EMI Analysis of the Proposed Converters 65
• 4.5.1 DM and CM EMI 66
• 4.5.2 DM and CM-EMI filter design based on odd order harmonics 70
• 4.5.3 DM and CM EMI filter design based on even order harmonics 71
• 4.6 Experimental Results 72
• 4.6.1 Balanced resistive load 72
• 4.6.2 Highly distorted input voltage 72
• 4.6.3 Inductive load 76
• 4.6.4 Unbalanced load 78
• 4.7 Summary 79
• Chapter 5. Three-Phase Buck-Boost AC-AC Converter 80
• 5.1 Conventional Three-Phase Buck-Boost AC-AC Converters 80
• 5.2 Proposed Three-Phase Buck-Boost AC-AC Converter 82
• 5.3 Operational Modes with PWM Switching Strategy-I 84
• 5.3.1 Mode 1 84
• 5.3.2 Mode 2 86
• 5.4 Operational Modes with PWM Switching Strategy-II 86
• 5.4.1 Mode 1 87
• 5.4.2 Mode 2 88
• 5.4.3 Mode 3 88
• 5.4.4 Mode 4 88
• 5.5 Components Design and Selection 89
• 5.5.1 Voltage stress of switches 89
• 5.5.2 Current stress of switches 90
• 5.5.3 Current stress of inductors 91
• 5.5.4 Voltage stress of capacitors 91
• 5.5.5 Design of inductors 91
• 5.5.6 Design of capacitors 92
• 5.5.7 Closed-loop control 93
• 5.6 Simulation Results 94
• 5.7 Experimental Results 98
• 5.8 Summary 105
• Chapter 6. Cascaded Dual-Buck AC-AC Converters 106
• 6.1 Proposed Cascaded Dual-Buck AC–AC Converters 108
• 6.1.1 Type-I 108
• 6.1.2 Type-II 110
• 6.2 Operation of the Proposed Dual-Buck AC-AC Converters 111
• 6.2.1 Mode 1 111
• 6.2.2 Mode 2 111
• 6.3 Reliability and Magnetic Volume Comparison of Type-I and Type-II Converters .. 113
• 6.3.1 Reliability comparison 113
• 6.3.2 Magnetic volume comparison 115
• 6.4 Phase-Shift Control and Current Ripple Analysis 115
• 6.4.1 Inductor current ripple without phase-shift control 115
• 6.4.2 Inductor current ripple with phase-shift control 117
• 6.4.3 Inductor current ripple analysis of the 4-unit cascaded converter 118
• 6.5 Comparative Simulation Results 120
• 6.6 Comparative Experimental Results 123
• 6.7 Summary 129
• Chapter 7. Single-Stage Buck-Boost Inverters with Fewer Switches 130
• 7.1 Conventional Single-Stage Buck–Boost Inverters 130
• 7.2 Dual-Buck Structured Inverters 131
• 7.3 Proposed Buck–Boost Inverters 133
• 7.4 PWM Strategies 134
• 7.4.1 PWM strategy I 136
• 7.4.2 PWM strategy II 139
• 7.4.3 PWM strategy III 139
• 7.5 Parameter Design 140
• 7.5.1 Voltage gain 140
• 7.5.2 Switch voltage stress 140
• 7.5.3 Switch current stress 142
• 7.5.4 Inductor current stress 142
• 7.5.5 Design of capacitors 142
• 7.5.6 Design of inductor 143
• 7.5.7 Magnetic volume and reliability 144
• 7.5.8 Common-mode voltage 145
• 7.6 Power Loss Analysis 147
• 7.6.1 Core loss 147
• 7.6.2 Conduction loss 147
• 7.6.3 Switching loss 149
• 7.7 Experimental Results 152
• 7.8 Conclusion 159
• Chapter 8. Single Stage Buck-Boost Inverter with Reduced Stresses 161
• 8.1 Circuit Topology of the Proposed Buck-Boost Inverter 161
• 8.2 Operation of the Proposed Buck-Boost Inverter 163
• 8.2.1 Buck operation 164
• 8.2.2 Boost operation 167
• 8.2.3 Overlap-time mode 171
• 8.2.4 Dead-time mode 171
• 8.3 Control Strategy and Parameter Design of the Proposed Inverter 171
• 8.3.1 Inductor design 171
• 8.3.2 Rating of semiconductor devices 172
• 8.3.3 Control block diagram 173
• 8.4 Simulation Results 174
• 8.5 Experimental Results 176
• 8.5.1 Resistive load 179
• 8.5.2 Open load 179
• 8.5.3 Partially inductive load 179
• 8.6 Summary 182
• Chapter 9. Cascaded Dual-Buck Inverter with Reduced Number of Inductors 184
• 9.1 Circuit Topology of the Proposed Inverter 186
• 9.2 Operation of the Proposed Inverter 188
• 9.2.1 Traditional bipolar PWM strategy 188
• 9.2.2 Traditional unipolar PWM strategy 191
• 9.2.3 Hybrid bipolar PWM strategy 194
• 9.2.4 Hybrid unipolar PWM strategy 196
• 9.3 Phase-Shift Control and Current Ripple Analysis 198
• 9.4 Comparison with the Conventional CHB DBI 202
• 9.5 Experimental Results 204
• 9.6 Summary 209
• Chapter 10. Neutral Point Clamped Inverters without Shoot-Through 210
• 10.1 Proposed Neutral Point Clamped Inverters 213
• 10.2 Operation of the Proposed TLNPCI 216
• 10.2.1 Operation principle 216
• 10.2.2 Operation in overlap and dead-times 218
• 10.3 Comparison with the Conventional Dual-Buck TLNPCIs 220
• 10.4 Operation with Dead-Time and Shoot-Through Faults 223
• 10.5 Experimental Results 229
• 10.6 Summary 31
• Chapter 11. Conclusion 232
• 11.1 Summary and Major Contributions 232
• 11.2 Publications 234
• 11.3 References 239