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    Watershed algorithm을 위한 병렬 처리기 구조 = A parallel image processing system for watershed algorithm

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    https://www.riss.kr/link?id=T8944407

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    다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

    The watershed transformation is a mid-level operation used in morphological image segmentation. It is well known that watershed transformations are made of very large amount of data and that many operations per pixel must be performed in order to achieve useful result of segmentation.
    This thesis proposes a parallel image processing system for watershed algorithm, which is based on Park's multi-access memory system. The proposed parallel image processing system use SIMD computer together with MIMD computer architecture for making to parallelize watersheds.
    The proposed parallel image processing system consists of microprocessor, PE modules, DMA controller and sixty seven multi-access memory systems. The microprocessor controls DMA controller, each PE modules, and establish the communication among the host computer and the PE module. The multi-access memory system consists of four PEs and five memory modules.
    The function and performance of the proposed architecture is simulated and verified by Cadence Verilog-XL, and we shows that the matrix operation such as comparision with pixels can be effectively implemented with the proposed architecture. Experimental result of proposed system is compared to result of serial-processing systme.
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    The watershed transformation is a mid-level operation used in morphological image segmentation. It is well known that watershed transformations are made of very large amount of data and that many operations per pixel must be performed in order to achi...

    The watershed transformation is a mid-level operation used in morphological image segmentation. It is well known that watershed transformations are made of very large amount of data and that many operations per pixel must be performed in order to achieve useful result of segmentation.
    This thesis proposes a parallel image processing system for watershed algorithm, which is based on Park's multi-access memory system. The proposed parallel image processing system use SIMD computer together with MIMD computer architecture for making to parallelize watersheds.
    The proposed parallel image processing system consists of microprocessor, PE modules, DMA controller and sixty seven multi-access memory systems. The microprocessor controls DMA controller, each PE modules, and establish the communication among the host computer and the PE module. The multi-access memory system consists of four PEs and five memory modules.
    The function and performance of the proposed architecture is simulated and verified by Cadence Verilog-XL, and we shows that the matrix operation such as comparision with pixels can be effectively implemented with the proposed architecture. Experimental result of proposed system is compared to result of serial-processing systme.

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    목차 (Table of Contents)

    • 목차
    • 제 1 장 서론 = 1
    • 제 2 장 다중접근 기억장치 및 병렬처리기 = 4
    • 2.1 다중접근 기억장치 = 4
    • 2.2 기능함수 = 5
    • 목차
    • 제 1 장 서론 = 1
    • 제 2 장 다중접근 기억장치 및 병렬처리기 = 4
    • 2.1 다중접근 기억장치 = 4
    • 2.2 기능함수 = 5
    • 2.2.1 모듈 할당 함수(μ) = 5
    • 2.2.2 주소 할당 함수(α) = 6
    • 2.3 다중접근 기억장치의 기능회로 = 7
    • 제 3 장 Watershed 알고리즘 = 8
    • 3.1 Watershed 알고리즘의 구현 = 9
    • 3.1.1 순차적 Watershed 알고리즘 = 9
    • 3.1.2 Watershed 알고리즘의 병렬화 구현 = 14
    • 3.2 병렬 Watershed 알고리즘을 이용한 영상 분할 = 16
    • 제 4 장 병렬 영상처리기 제안 = 19
    • 4.1 제안된 병렬 영상처리기 구조 = 19
    • 4.2 설계 및 구현 = 21
    • 4.2.1 Processor Unit = 21
    • 4.2.2 Processing Element Unit = 22
    • 4.2.3 Memory Controller Unit = 25
    • 4.2.4 Control Memory Unit = 27
    • 4.2.5 Memory Module = 28
    • 4.2.6 알고리즘의 병렬화 및 pseudo 명령 = 28
    • 4.3 설계 검증 및 시뮬레이션 = 30
    • 제 5 장 성능 분석 및 검토 = 35
    • 제 6 장 결론 = 37
    • 참고문헌 = 38
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