1 박성현, "현대실험계획법" 민영사 2003
2 Zhang Wenge, "The effects of underfill epoxy on warpage in flip-chip assembles" 21 (21): 323-, 1998
3 Mario A. Bolanos, "Semiconductor IC Packaging Technology Challenges:The Next Five Years" Texas Instruments
4 Darveaux, "Reliability of Plastic Ball Grid Array Assembly, In Ball Grid Array Technology" McGraw-Hill 1995
5 조승현, "New dummy design and stiffener on warpage reduction in Ball Grid Array Printed Circuit Board" PERGAMON-ELSEVIER SCIENCE LTD 50 : 242-250, 201002
6 "MARC 2011 user manual"
7 Ming-Yi Tsi, "Investgation of thermomechanical behaviors of flip chip BGA packages during manufacuring process and thermal cycling" 27 (27): 568-, 2004
8 R. Darveaux, "Interface Failure in Lead Free Solder Joints" 2006
9 조승현, "Estimation of warpage and thermal stress of IVHs in flip-chip ball grid arrays package by FEM" Elsevier BV 48 (48): 300-309, 200802
10 Lau, "Electronic Packaging: Design, Materials, Process, and Reliability" McGraw-Hill 1997
1 박성현, "현대실험계획법" 민영사 2003
2 Zhang Wenge, "The effects of underfill epoxy on warpage in flip-chip assembles" 21 (21): 323-, 1998
3 Mario A. Bolanos, "Semiconductor IC Packaging Technology Challenges:The Next Five Years" Texas Instruments
4 Darveaux, "Reliability of Plastic Ball Grid Array Assembly, In Ball Grid Array Technology" McGraw-Hill 1995
5 조승현, "New dummy design and stiffener on warpage reduction in Ball Grid Array Printed Circuit Board" PERGAMON-ELSEVIER SCIENCE LTD 50 : 242-250, 201002
6 "MARC 2011 user manual"
7 Ming-Yi Tsi, "Investgation of thermomechanical behaviors of flip chip BGA packages during manufacuring process and thermal cycling" 27 (27): 568-, 2004
8 R. Darveaux, "Interface Failure in Lead Free Solder Joints" 2006
9 조승현, "Estimation of warpage and thermal stress of IVHs in flip-chip ball grid arrays package by FEM" Elsevier BV 48 (48): 300-309, 200802
10 Lau, "Electronic Packaging: Design, Materials, Process, and Reliability" McGraw-Hill 1997
11 Lau John, "Effects of Build-Up Printed Circuit Board Thickness in the Solder Joint Reliability of a Wafer Level Chip Scale Package(WLCSP)" 25 (25): 3-, 2002
12 X. J. Fan, "Design and optimization of thermo-mechanical reliability in wafer level packaging" 50 (50): 536-, 2010
13 Chiu Christine, "Challenges of thin core PCB Flip Chip package on advanced Si Nodes" 2007
14 Elva Lin, "Advantage and challenge of coreless Flipchip BGA Microsystems" 346-, 2007