With the advancement of AI technology, various AI functions are being integrated into electronic devices. Consequently, the system on chip (SoC) that powers these devices requires a wider bandwidth, which leads to increased power consumption. To addre...
With the advancement of AI technology, various AI functions are being integrated into electronic devices. Consequently, the system on chip (SoC) that powers these devices requires a wider bandwidth, which leads to increased power consumption. To address this issue, this research report proposes a 4Gb/s pulse amplitude modulation-4 (PAM-4) transmitter operating in voltage mode using source series termination (SST). Compared to non-return-to-zero (NRZ) transmitters, the PAM-4 scheme offers advantages in terms of bandwidth. Furthermore, operating in voltage mode rather than current mode in PAM-4 reduces current consumption, resulting in lower power consumption. Although impedance matching in voltage mode is more challenging than in current mode, the use of SST resistors overcomes this limitation. To implement PAM-4 operation, four metal-oxide-semiconductor field-effect transistors (MOSFETs) are used, and the impedance ratio of each MOSFET is set to 1.5:3 to maintain the uniformity of the intervals between the four waveform levels. The impedance values are formed by the combination of the MOSFET's on-resistance and the SST resistance, with the MOSFET on-resistance being determined by adjusting the MOSFET size.
The circuit implemented in this research is designed using Samsung's 28-nm CMOS process. simulations were conducted under conditions of 50-ohm channel and receiver impedance, and 1pF receiver capacitance. The supply voltage used is 0.9V, with an output swing of 500mV at a data rate of 4Gb/s. The transmitter driver output impedance is 50 ohms, and the power consumption is 1.013mW.