Conventional CMOS transistors for high performance with a 70-nm physical gate length were
fabricated to evaluate the 130-nm-technology node. In this work, we enhanced the performance
of transistors by using high-dose P+ implantation, a plasma-nitridat...
Conventional CMOS transistors for high performance with a 70-nm physical gate length were
fabricated to evaluate the 130-nm-technology node. In this work, we enhanced the performance
of transistors by using high-dose P+ implantation, a plasma-nitridation gas oxide, a hydrogen prebake
(HPB), and a mechanical stress layer. We also reduced the overlap capacitances by using an
oset spacer. The NMOS and PMOS have drive currents equal to 880 A/m and 420 A/m,
respectively, with Ioff = 10 nA/m at Vdd = 1.2 V. The unit delay of the ring oscillator (1 fan-out)
was 11.5 ps.