A New Implementation of Multilevel Framework for Interconnect-Driven Floorplanning

다국어 초록 (Multilingual Abstract)

In this paper, we propose a multilevel fixed-outline floorplanning method, called multilevel IARFP, to deal with floorplanning problem for the large-scale integrated circuit designs. We combine the IARFP [1] into the V-shaped multilevel framework [2], engaging in getting a better result with minimized wirelength. We recursively partition the circuits by using hMetis [3], to get min-cut cost. After the partition stage, we do floorplanning from top to down building sequences for merging and refinement stage. Then we bottom-up merge the sub-regions into big regions until attain the final floorplan. The IARFP is based on Sequence Pair [7] representation; for multilevel case, we present multilevel Sequence Pair representation to handle the floorplanning. We can get about 11% reductions in wirelength within about 55% run time comparing with flat IARFP algorithm.

목차 (Table of Contents)

• Abstract
• 1. Introduction
• 2. Multilevel Sequence Pair Representation
• 3. Multilevel Expanding of IARFP
• 4. Experimental Results
• 5. Conclusion
• REFERENCES