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1 V. Zyuban, "Unified methodology for resolving powerperformance tradeoffs at the microarchitectural and circuit levels" ACM 166-171, 2002
2 J. P. Duarte, "Unified FinFET compact model: Modelling Trapezoidal Triple-Gate FinFETs" 135-138, 2013
3 E. J. Nowak, "Turning silicon on its edge double gate CMOS/FinFET technology" 20 (20): 20-31, 2004
4 J. Slotboom, "The pn-product in silicon" 20 (20): 279-283, 1977
5 M. Bohr, "The evolution of scaling from the homogeneous era to the heterogeneous era" 1-1, 2011
6 "Sentaurus TCAD User Guide, Ver. H-2013.03"
7 W. Kehuey, "Performance advantage and energy saving of triangular-shaped FinFETs" 143-146, 2013
8 R. Giacomini, "Non-Vertical Sidewall Angle Influence on Triple-Gate FinFETs Corner Effects" 6 (6): 381-386, 2007
9 Y. Taur, "Modern VLSI devices" Cambridge Univ. Press 2009
10 D. Zhang, "Modeling of photoresist erosion in plasma etching processes" 30 (30): 114-115, 2002
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