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    KCI등재 SCIE SCOPUS

    Compact and Power-efficient Sobel Edge Detection with Fully Connected Cube-network-based Stochastic Computing

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    https://www.riss.kr/link?id=A107097702

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    다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

    Stochastic computing, an approximate computing method using bitstreams, has attracted attention as an alternative to deterministic computing. Stochastic computing circuits are known to perform complex calculations with high density through probability calculations. Herein, we describe the design of an accurate and compact arithmetic circuit based on stochastic computing. First, we propose a simple technique to change the output of a random number generator that is an integral part of stochastic computing for stochastic multipliers and adders. Compared with conventional designs, the results indicate that the proposed design reduces power and area and enhances the performance. This method uses a fully connected cube network and does not lose accuracy without overhead. Subsequently, when applying this design to image processing in the real world, a 63% area reduction and 95% power savings are achieved when compared to an accurate operator. Therefore, it is clear that the proposed design is optimized for energy-efficient hardware designs with high imprecision tolerance.
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    Stochastic computing, an approximate computing method using bitstreams, has attracted attention as an alternative to deterministic computing. Stochastic computing circuits are known to perform complex calculations with high density through probability...

    Stochastic computing, an approximate computing method using bitstreams, has attracted attention as an alternative to deterministic computing. Stochastic computing circuits are known to perform complex calculations with high density through probability calculations. Herein, we describe the design of an accurate and compact arithmetic circuit based on stochastic computing. First, we propose a simple technique to change the output of a random number generator that is an integral part of stochastic computing for stochastic multipliers and adders. Compared with conventional designs, the results indicate that the proposed design reduces power and area and enhances the performance. This method uses a fully connected cube network and does not lose accuracy without overhead. Subsequently, when applying this design to image processing in the real world, a 63% area reduction and 95% power savings are achieved when compared to an accurate operator. Therefore, it is clear that the proposed design is optimized for energy-efficient hardware designs with high imprecision tolerance.

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    참고문헌 (Reference)

    1 I. Sobel, "a talk at the Stanford Artificial Project" 271-272, 1968

    2 I. F. Akyildiz, "Wireless mesh networks: a survey" 445-487, 2005

    3 M. Yang, "Towards theoretical cost limit of stochastic number generators for stochastic computing" 154-159, 2018

    4 A. Alaghi, "The promise and challenge of stochastic computing" 37 (37): 1515-1531, 2018

    5 A. Alaghi, "Survey of stochastic computing" 12(2s) (12(2s)): 1-19, 2013

    6 B. R. Gaines, "Stochastic computing systems" 2 : 37-172, 1969

    7 A. Alaghi, "Stochastic circuits for real-time image-processing applications" 1-6, 2013

    8 J. Y. F. Tong, "Reducing power by optimizing the necessary precision/range of floating-point arithmetic" 8 (8): 273-286, 2000

    9 "Quartus User manual"

    10 H. Joe, "Novel stochastic computing for energy-efficient image processors" 8 (8): 449-462, 2019

    1 I. Sobel, "a talk at the Stanford Artificial Project" 271-272, 1968

    2 I. F. Akyildiz, "Wireless mesh networks: a survey" 445-487, 2005

    3 M. Yang, "Towards theoretical cost limit of stochastic number generators for stochastic computing" 154-159, 2018

    4 A. Alaghi, "The promise and challenge of stochastic computing" 37 (37): 1515-1531, 2018

    5 A. Alaghi, "Survey of stochastic computing" 12(2s) (12(2s)): 1-19, 2013

    6 B. R. Gaines, "Stochastic computing systems" 2 : 37-172, 1969

    7 A. Alaghi, "Stochastic circuits for real-time image-processing applications" 1-6, 2013

    8 J. Y. F. Tong, "Reducing power by optimizing the necessary precision/range of floating-point arithmetic" 8 (8): 273-286, 2000

    9 "Quartus User manual"

    10 H. Joe, "Novel stochastic computing for energy-efficient image processors" 8 (8): 449-462, 2019

    11 "Nangate: 45nm Open Cell Library"

    12 J. Duato, "Interconnection networks" Morgan Kaufmann 2013

    13 A. H. Esfahanian, "Generalized measures of fault tolerance with application to n-cube networks" 1586-1591, 1989

    14 A. Alaghi, "Fast and accurate computation using stochastic circuits" 1-4, 2014

    15 A. Alaghi, "Exploiting correlation in stochastic circuit design" 39-46, 2013

    16 A. Sampson, "Enerj:Approximate data types for safe and general lowpower computation" 46 (46): 164-174, 2011

    17 A. Alaghi, "Dimension reduction in statistical simulation of digital circuits" 1-8, 2015

    18 "Design Compiler ver.M-2016.12-SP5-5"

    19 "DE1-SoC User manual 1.2.2"

    20 V. T. Lee, "Correlation manipulating circuits for stochastic computing" 1417-1422, 2018

    21 P. Li, "Computation on Stochastic Bit Streams Digital Image Processing Case Studies" 22 (22): 449-462, 2014

    22 H. Ichihara, "Compact and accurate stochastic circuits with shared random number sources" 361-366, 2014

    23 A. Agrawal, "Approximate computing:Challenges and opportunities" 1-8, 2016

    24 J. Han, "Approximate computing: An emerging paradigm for energyefficient design" 1-6, 2013

    25 K. K. Parhi, "Analysis of stochastic logic circuits in unipolar, bipolar and hybrid formats" 1-4, 2017

    26 W. Qian, "An architecture for fault-tolerant computation with stochastic logic" 65 (65): 93-105, 2011

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    학술지 이력

    학술지 이력
    연월일 이력구분 이력상세 등재구분
    2023 평가 해외DB학술지평가 신청대상 (해외등재 학술지 평가)
    2020-01-01 등재 등재학술지 유지 (해외등재 학술지 평가) KCI등재
    2014-01-21 학회명변경 영문명 : The Institute Of Electronics Engineers Of Korea -> The Institute of Electronics and Information Engineers KCI등재
    2010-11-25 학술지명변경 한글명 : JOURNAL OF SEMICONDUTOR TECHNOLOGY AND SCIENCE -> JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE KCI등재
    2010-01-01 등재 등재학술지 선정 (등재후보2차) KCI등재
    2009-01-01 등재 등재후보 1차 PASS (등재후보1차) KCI등재후보
    2007-01-01 등재 등재후보학술지 선정 (신규평가) KCI등재후보
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    학술지 인용정보

    학술지 인용정보
    기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
    2016 0.42 0.13 0.35
    KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
    0.3 0.29 0.308 0.03
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