Speech recognition is widely used as easy-to-use interface for various devices, such as TV or car navigation systems, mostly in isolated word recognition configuration, which the system recognizes simple single word-based commands.
Extending the syste...
Speech recognition is widely used as easy-to-use interface for various devices, such as TV or car navigation systems, mostly in isolated word recognition configuration, which the system recognizes simple single word-based commands.
Extending the system to accept fluent, continuous speech with large vocabularies can provide much more convenient user interfaces. But the required amount of computation increases significantly for such large-vocabulary continuous speech recognition systems.
Recently, many mobile devices have multi-core processors for faster computation. To utilize these multi-cores, the conventional speech recognition algorithm must be modified for parallel computation, as the conventional algorithm has several dependencies which prevent it from computed in parallel.
In this thesis, a new speech recognition algorithm that can utilize multi-core processors for large-vocabulary continuous speech recognition is proposed. The proposed algorithm processes speech signals in a pipelined mechanism to create partial lattice results, which can be further processed in another processor cores. This can reduce computational overheads for a single core, and can provide faster response times.