Scenario-based Simulation Method and Tool for UML System Models

다국어 초록 (Multilingual Abstract)

During system development, how to validate that the system developed satisfies the user requirements and how to reduce the cost of system modification are very important issues. Simulation which is performed in the requirement analysis phase is a low cost alternative to the actual implementation and execution of a real system. UML state machine simulation makes it possible to check the correctness of system functionality and is widely recognized as a valuable analysis method. Therefore, we can easily evaluate several system models, check and correct the weakness of system models in the earlier development stage.
In order to simulate more efficiently, we choose a way of performing the simulation automatically based on user requirements, which can be represented by sequence diagrams. However, state machine diagrams and sequence diagrams have different system abstract hierarchy. Therefore it is impossible to combine them directly. To solve these problems, we use the method of adjusting state machine diagrams and sequence diagrams to the same abstract level.
In this thesis, we present a UML state machine simulation tool. This tool allows us to implement the state machine simulation based on sequence diagram. The simulation operations are based on analyzing labeled transition system (LTS) models transformed from UML state machine diagrams using a transformation approach we designed. For analyzing LTS models efficiently, we adopt reduction and composition method in compositional reachability analysis. And also state machine diagrams’ information removed in the process of abstraction will be recovered for generating actual simulation traces.

목차 (Table of Contents)

• I. Introduction = 1
• II. Background = 4
• 2.1 UML modeling = 4
• 2.2 Sequence diagram = 5
• 2.3 State machine diagram = 6
• 2.4 Finite system machine and labeled transition system = 8
• 2.4.1 Finite system machine = 8
• 2.4.2 Labeled transition system = 9
• III. State machine simulation based on sequence diagram = 11
• 3.1 Simulation based on sequence diagram = 11
• 3.2 An example system = 13
• 3.3 Transformation to LTS model = 15
• 3.3.1 Transformation from state machine diagram to LTS model = 15
• 3.3.2 Transformation from sequence diagram to LTS model = 19
• 3.4 Composing LTS = 21
• 3.4.1 Compositional hierarchy = 21
• 3.4.2 Composition = 22
• 3.5 Reducing LTS = 23
• 3.5.1 λ-elimination = 23
• 3.5.2 Reduction = 24
• 3.6 Inclusion checking = 26
• 3.7 Scenario recovering = 27
• 3.7.1 Recovery rule = 27
• 3.7.2 Recovery hierarchy = 28
• IV. Design of sequence diagram simulator = 31
• 4.1 Overall structure of sequence diagram simulator = 31
• 4.2 Transformer = 32
• 4.3 Composer = 34
• 4.4 Reducer = 35
• 4.5 Sequence diagram parser = 37
• 4.6 Inclusion checker = 38
• 4.7 Scenario recovery = 38
• V. Implementation and case study = 40
• 5.1 Implementation environment = 40
• 5.2 Case study: multiple integrated laser engagement system = 41
• 5.3 Verification of sequence diagram simulator = 45
• VI. Conclusions and future work = 47
• References = 48