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      KCI등재 SCOPUS

      Comparison of Silicon and Silicon-Tungsten Disulphide Heterojunction Based Tub-type Back Gated MOSFET Using Non-Equilibrium Green’s Function

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      https://www.riss.kr/link?id=A107820650

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      다국어 초록 (Multilingual Abstract)

      At nanoscale along with the failure of Metal oxide semiconductor field-effect transistor due to short channel effects, Silicon has raised as another bottleneck for researchers. In the last couple of decades, researchers have provided diff erent soluti...

      At nanoscale along with the failure of Metal oxide semiconductor field-effect transistor due to short channel effects, Silicon has raised as another bottleneck for researchers. In the last couple of decades, researchers have provided diff erent solutions in the form of Graphene and Transition Metal Dichalcogenides materials. Each Graphene and Transition Metal Dichalcogenides has its own set of disadvantages like poor I ON /I OFF ratio and lower carrier mobility and hence cannot be used individually. In this article, a tub type metal oxide semiconductor field-effect transistor is designed and for application of the device in a low power VLSI domain, the back-gated technique is used. Different device properties are studied first with a Silicon-based channel and then a Silicon-Tungsten Disulphide heterojunction channel. The selection of SiO2 as a gate insulator and contact material is also justified. This article shows that instead of using conventional Silicon-based devices it is better to use heterojunction devices, as they offer much lower OFF-state current and better linearity properties.

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      참고문헌 (Reference)

      1 N. Kumar, "performance assessment of charge plasma based cylindrical GAA vertical nanowire TFET with impact of interface trap charge"" 66 : 4453-4460, 2019

      2 D. Munteanu, "Two-dimensional modeling of quantum ballistic transport in ultimate double-gate SOI devices" 47 : 1219-1225, 2003

      3 R. Chaujar, "TCAD assessment of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET and its multi-layereded gate architecture, Part II: Analog and large signal performance evaluation" 46 (46): 645-655, 2009

      4 V. H. Nguyen, "Quantum modeling of the carrier mobility in FDSOIDevices" 61 (61): 3096-3102, 2014

      5 M. Niquet, "Quantum calculations of the carrier mobility: methodology, matthiessen’s rule, and comparison with semi-classical approaches" 115 (115): 054512-, 2014

      6 M. A. Raushan, "Performance enhancment of junctionless tunnel fi eld eff ect transistor using dual-k spacers" 13 : 912-920, 2018

      7 Prateek kumar, "Performance Analysis of Charge Plasma Based Five Layered Black Phosphorus-Silicon Heterostructure Tunnel Field Eff ect Transistor" springer 2019

      8 J. P. Colinge, "Nanowire transistors without junctions" 5 (5): 225-229, 2010

      9 ROGER LAKE, "NON-EQUILIBRIUM GREEN’S FUNCTIONS IN SEMICONDUCTOR DEVICE MODELING" WORLD SCIENTIFIC 143-158, 2003

      10 A. S. Mayrov, "Micrometer scale ballistic transport in encapsulated graphene at room temperature" 11 : 2396-2399, 2011

      1 N. Kumar, "performance assessment of charge plasma based cylindrical GAA vertical nanowire TFET with impact of interface trap charge"" 66 : 4453-4460, 2019

      2 D. Munteanu, "Two-dimensional modeling of quantum ballistic transport in ultimate double-gate SOI devices" 47 : 1219-1225, 2003

      3 R. Chaujar, "TCAD assessment of Gate Electrode Workfunction Engineered Recessed Channel (GEWE-RC) MOSFET and its multi-layereded gate architecture, Part II: Analog and large signal performance evaluation" 46 (46): 645-655, 2009

      4 V. H. Nguyen, "Quantum modeling of the carrier mobility in FDSOIDevices" 61 (61): 3096-3102, 2014

      5 M. Niquet, "Quantum calculations of the carrier mobility: methodology, matthiessen’s rule, and comparison with semi-classical approaches" 115 (115): 054512-, 2014

      6 M. A. Raushan, "Performance enhancment of junctionless tunnel fi eld eff ect transistor using dual-k spacers" 13 : 912-920, 2018

      7 Prateek kumar, "Performance Analysis of Charge Plasma Based Five Layered Black Phosphorus-Silicon Heterostructure Tunnel Field Eff ect Transistor" springer 2019

      8 J. P. Colinge, "Nanowire transistors without junctions" 5 (5): 225-229, 2010

      9 ROGER LAKE, "NON-EQUILIBRIUM GREEN’S FUNCTIONS IN SEMICONDUCTOR DEVICE MODELING" WORLD SCIENTIFIC 143-158, 2003

      10 A. S. Mayrov, "Micrometer scale ballistic transport in encapsulated graphene at room temperature" 11 : 2396-2399, 2011

      11 Naveen Kumar, "Low voltage charge-plasma based dopingless Tunnel Field Effect Transistor: analysis and optimization" Springer Science and Business Media LLC 26 (26): 1343-1350, 2020

      12 T. Roy, "Dual-gated MoS2/WSe2 van der waals tunnel diodes and transistors"" 9 : 207-2079, 2015

      13 M. Jagadesh Kumar, "Doping-less tunnel fi eld eff ect transistor : design and investigation" 60 (60): 3285-3290, 2013

      14 N. Kumar, "Design and investigation of charge-plasma based work function engineered dualmetal-heterogeneous gate SiSi0.55Ge0.45 GAA-cylindrical NWTFET for ambipolar analysis" 66 (66): 1468-1474, 2019

      15 Choi Woo Young, "Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs)" 나노기술연구협의회 3 (3): 1-15, 2016

      16 S. O. Koswatta, "D.E. performance comparison between tunneling transistors and conventional MOSFETS" 56 (56): 456-465, 2009

      17 I. Yang, "Back-Gated CMOS on SOIAS for dynamic threshold voltage control"" 44 : 822-, 1997

      18 "ATLAS Device Simulation Software"

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      공동연구자 (7)

      유사연구자 (20) 활용도상위20명

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      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2023 평가예정 해외DB학술지평가 신청대상 (해외등재 학술지 평가)
      2020-01-01 평가 등재학술지 유지 (해외등재 학술지 평가) KCI등재
      2011-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2009-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2006-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
      2005-05-30 학회명변경 영문명 : 미등록 -> The Korean Institute of Electrical and Electronic Material Engineers KCI등재후보
      2005-05-30 학술지명변경 한글명 : Transactions on Electrical and Electroni -> Transactions on Electrical and Electronic Materials KCI등재후보
      2005-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2003-01-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
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      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.08 0.08 0.1
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.1 0.11 0.239 0.07
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