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    A Continuous Regional Current-Voltage Model for Short-channel Double-gate MOSFETs

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    https://www.riss.kr/link?id=A99655094

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    다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

    A continuous, explicit drain-current equation for short-channel double-gate (DG) MOSFETs has been derived based on the explicit surface potential equation. The model is physically derived from Poisson’s equation in each region of operation and adopted in the unified regional approach. The proposed model has been verified with numerical solutions, physically scalable with channel length and gate/oxide materials as well as oxide/channel thicknesses.
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    A continuous, explicit drain-current equation for short-channel double-gate (DG) MOSFETs has been derived based on the explicit surface potential equation. The model is physically derived from Poisson’s equation in each region of operation and adopt...

    A continuous, explicit drain-current equation for short-channel double-gate (DG) MOSFETs has been derived based on the explicit surface potential equation. The model is physically derived from Poisson’s equation in each region of operation and adopted in the unified regional approach. The proposed model has been verified with numerical solutions, physically scalable with channel length and gate/oxide materials as well as oxide/channel thicknesses.

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    목차 (Table of Contents)

    • Abstract
    • Ⅰ. INTRODUCTION
    • Ⅱ. ANALYTICAL LONG-CHANNEL CURRENTVOLTAGE SOLUTION
    • Ⅲ. ANALYTICAL SHORT-CHANNEL CURRENTVOLTAGE SOLUTION
    • Ⅳ. RESULTS AND DISCUSSION
    • Abstract
    • Ⅰ. INTRODUCTION
    • Ⅱ. ANALYTICAL LONG-CHANNEL CURRENTVOLTAGE SOLUTION
    • Ⅲ. ANALYTICAL SHORT-CHANNEL CURRENTVOLTAGE SOLUTION
    • Ⅳ. RESULTS AND DISCUSSION
    • Ⅴ. CONCLUSIONS
    • REFERENCES
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    참고문헌 (Reference)

    1 J. P. Colinge, 48 : 897-905, 2004

    2 Y. Taur, 21 : 245-247, 2000

    3 K. Kim, 48 (48): 294-299, 2001

    4 K. Suzuki, 42 (42): 1940-1948, 1995

    5 J. He, 2 : 124-127, 2004

    6 X. Zhou, WCM : 25-30, 2005

    7 A. Ortiz-Conde, 47 : 2067-2074, 2003

    8 X. Shi, 50 : 1793-1800, 2003

    9 K. Suzuki, "Scaling theory for double-gate SOI MOSFET’s" 40 (40): 2326-2329, 1993

    10 P. Francis, "Modeling of ultrathin double-gate nMOS/SOI transistors" 41 (41): 715-720, 1994

    1 J. P. Colinge, 48 : 897-905, 2004

    2 Y. Taur, 21 : 245-247, 2000

    3 K. Kim, 48 (48): 294-299, 2001

    4 K. Suzuki, 42 (42): 1940-1948, 1995

    5 J. He, 2 : 124-127, 2004

    6 X. Zhou, WCM : 25-30, 2005

    7 A. Ortiz-Conde, 47 : 2067-2074, 2003

    8 X. Shi, 50 : 1793-1800, 2003

    9 K. Suzuki, "Scaling theory for double-gate SOI MOSFET’s" 40 (40): 2326-2329, 1993

    10 P. Francis, "Modeling of ultrathin double-gate nMOS/SOI transistors" 41 (41): 715-720, 1994

    11 A. Ortiz-Conde, "Long-channel silicon-on-insulator MOSFET theory" 35 : 1291-1298, 1992

    12 R. M. Corless, "Lambert’s W Function in Maple, Technical Report" Dept. of Applied Math., Univ. of Western Ontario

    13 Zhaomin Zhu, "Explicit Compact Surface-potential and Drain-Current Models for Generic Asymmetric Double-gate Metal- Oxide-Semiconductor Field-Effect Transistors" 46 (46): 2067-2072, 2007

    14 F. Balestra, "Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance" EDL-8 (EDL-8): 410-412, 1987

    15 Q. Chen, "Double jeopardy in the nanoscale court" 19 (19): 28-34, 2003

    16 S. Malobabic, "Circuits and Systems, Dominican Republic" 19-25, 2004

    17 Christian C. Enz, "Chargebased MOS Transistor Modeling: The EKV Model for Low-Power and RF IC Design" John Wiley & Sons, Ltd 59-, 2006

    18 X. Shi, "Analytical solutions to the one-dimensional oxide-silicon-oxide system" 50 (50): 1793-1800, 2003

    19 Y. Taur, "Analytic solutions of charge and capacitance in symmetric and asymmetric doublegate MOSFETs" 48 (48): 2861-2869, 2001

    20 A. Ortiz-Conde, "Analytic solution of the channel potential in undoped symmetric dual-gate MOSFETs" 52 (52): 1669-1672, 2005

    21 Z. Zhu, "Analytic and explicit current model of undoped double-gate MOSFETs" 43 (43): 1464-1466, 2007

    22 H. R. Farrah, "Analysis of double-gate thin-film transistor" ED-14 (ED-14): 69-74, 1967

    23 K. K. Young, "Analysis of conduction in fully depleted SOI MOSFET’s" 36 (36): 504-506, 1989

    24 Y. S. Yu, "All-analytic surface potential model for SOI MOSFETs" INSTITUTION ENGINEERING TECHNOLOGY-IET 152 (152): 183-188, 2005

    25 J. W. Sleight, "A continuous compact MOSFET model for fully- and partially-depleted SOI devices" 45 (45): 821-825, 1998

    26 Taur, "A Continuous, Analytic Drain-Current Model for DG MOSFETs" 25 (25): 2004

    27 Xiaoping Liang, "A 2-D Analytical Solution for SCEs in DG MOSFETs" 51 : 1385-1391, 2004

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    학술지 이력

    학술지 이력
    연월일 이력구분 이력상세 등재구분
    2023 평가 해외DB학술지평가 신청대상 (해외등재 학술지 평가)
    2020-01-01 등재 등재학술지 유지 (해외등재 학술지 평가) KCI등재
    2014-01-21 학회명변경 영문명 : The Institute Of Electronics Engineers Of Korea -> The Institute of Electronics and Information Engineers KCI등재
    2010-11-25 학술지명변경 한글명 : JOURNAL OF SEMICONDUTOR TECHNOLOGY AND SCIENCE -> JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE KCI등재
    2010-01-01 등재 등재학술지 선정 (등재후보2차) KCI등재
    2009-01-01 등재 등재후보 1차 PASS (등재후보1차) KCI등재후보
    2007-01-01 등재 등재후보학술지 선정 (신규평가) KCI등재후보
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    기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
    2016 0.42 0.13 0.35
    KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
    0.3 0.29 0.308 0.03
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