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      PRAM-based hybrid memory management

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      https://www.riss.kr/link?id=T12167773

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      다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

      Current main memory that mostly consists of DRAM, has already reached the limits of improving its scalability. On the contrary, PRAM, one of the best alternatives for future main memory, is high density memory to meet the requirements for future down-scaling and has non-volatile characteristics. Moreover, compared to legacy non-volatile memories such as flash memories, PRAM shows better performance and reliability. However, there are some challenges to be addressed such as relatively limited endurance and lower write speed.
      This paper presents a PRAM-based hybrid memory management scheme. Our proposed scheme utilizes an access pattern of applications to main memory. Using PRAM's physical characteristics such as asymmetric read/write latency and relatively higher density, we achieved over a couple of times better system performance enhancement. Moreover, to address a wear-leveling problem, one of the severe challenges in optimizing the performance and reliability of NVRAM, we propose sloppy wear-leveling policy. It shows good performance comparable to existing strict wear-leveling schemes with negligible cost.
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      Current main memory that mostly consists of DRAM, has already reached the limits of improving its scalability. On the contrary, PRAM, one of the best alternatives for future main memory, is high density memory to meet the requirements for future down-...

      Current main memory that mostly consists of DRAM, has already reached the limits of improving its scalability. On the contrary, PRAM, one of the best alternatives for future main memory, is high density memory to meet the requirements for future down-scaling and has non-volatile characteristics. Moreover, compared to legacy non-volatile memories such as flash memories, PRAM shows better performance and reliability. However, there are some challenges to be addressed such as relatively limited endurance and lower write speed.
      This paper presents a PRAM-based hybrid memory management scheme. Our proposed scheme utilizes an access pattern of applications to main memory. Using PRAM's physical characteristics such as asymmetric read/write latency and relatively higher density, we achieved over a couple of times better system performance enhancement. Moreover, to address a wear-leveling problem, one of the severe challenges in optimizing the performance and reliability of NVRAM, we propose sloppy wear-leveling policy. It shows good performance comparable to existing strict wear-leveling schemes with negligible cost.

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      목차 (Table of Contents)

      • 1. Introduction 1
      • 2. Related Work 4
      • 3. PRAM-based hybrid memory system 7
      • 3.1. Hybrid memory management based on memory access patterns 7
      • 3.2. Sloppy Wear-leveling 9
      • 1. Introduction 1
      • 2. Related Work 4
      • 3. PRAM-based hybrid memory system 7
      • 3.1. Hybrid memory management based on memory access patterns 7
      • 3.2. Sloppy Wear-leveling 9
      • 3.3. Robustness 10
      • 4. Experimental Methodology 12
      • 4.1. Simulator Configuration 12
      • 4.2. Workloads 13
      • 5. Results and Analysis 14
      • 5.1. Performance 14
      • 5.1.1. memory configuration 14
      • 5.1.2. Access pattern 15
      • 5.1.3. Pattern-based vs. LRU 16
      • 5.2. Wearleveling 17
      • 6. Conclusion 19
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