In this paper, the design of the array type power MOSFETs is discussed in terms of on-resistance, breakdown voltage, placement of FLRs(field limiting ring) and threshold voltage. Also, 9-cell(square-on square grid) VDMOSs are fabricated to confirm the...
In this paper, the design of the array type power MOSFETs is discussed in terms of on-resistance, breakdown voltage, placement of FLRs(field limiting ring) and threshold voltage. Also, 9-cell(square-on square grid) VDMOSs are fabricated to confirm the feasibility of the design method.
Existence of optimum p-well spacing for minimum on-resistance, which is anticipated by the theoretical results is confirmed by the experiment of the fabricated power MOSFETs. Breakdown voltage of power MOSFET is upgraded by using two FLR's and their optimum placement is determined from the experimental results of the diodes with FLRs. The threshold voltage is controlled by the ion implantation within the design specification. Experimental results are in good agreement with the design specification. Experimental results are in good agreement with the design values. Characteristics of the fabricated power MOSFETs are 190Ω in on-resistance, 270V in breakdown voltage and 2.9V in thershold voltage.