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      입출력 형태에 따른 다중처리기 시스템의 성능 분석 = An Analysis of Multi-processor System Performance Depending on the Input/Output Types

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      https://www.riss.kr/link?id=A102901710

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      다국어 초록 (Multilingual Abstract)

      This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.
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      This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in re...

      This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

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      참고문헌 (Reference)

      1 장범환, "트래픽 세션의 포트 역할을 이용한 네트워크 공격 시각화" (사)디지털산업정보학회 11 (11): 47-60, 2015

      2 Wen-Tsuen Chen, "Performance Analysis of Multiple Bus Interconnection Networks with Hierarchical Requesting Model" 50 (50): 834-842,

      3 Janaki Akella, "Modeling and Measurement of the Impact of Input and Output on System Performance" 390-399, 2005

      4 양환석, "Mobile Ad-hoc Network에서 영역기반 보안 멀티캐스트 기법 연구" (사)디지털산업정보학회 12 (12): 75-85, 2016

      5 Men-Chow Chiang, "Experience with Mean Value Analysis Models for Evaluating Shared Bus, Throughput-Oriented Multiprocessors" 19 : 90-102, 2003

      6 Men-Chow Chiang, "Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment" 51 (51): 297-317,

      7 Qing Yang, "Analysis of Packet-Switched Multiple-Bus Multiproessor Systems" 50 : 352-357, 2001

      8 J. L. Grino, "Analysis and Simulation of Multiplexed Single-Bus Networks with and without Buffering" 414-421, 1995

      9 Per Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors" 12-24, 2000

      1 장범환, "트래픽 세션의 포트 역할을 이용한 네트워크 공격 시각화" (사)디지털산업정보학회 11 (11): 47-60, 2015

      2 Wen-Tsuen Chen, "Performance Analysis of Multiple Bus Interconnection Networks with Hierarchical Requesting Model" 50 (50): 834-842,

      3 Janaki Akella, "Modeling and Measurement of the Impact of Input and Output on System Performance" 390-399, 2005

      4 양환석, "Mobile Ad-hoc Network에서 영역기반 보안 멀티캐스트 기법 연구" (사)디지털산업정보학회 12 (12): 75-85, 2016

      5 Men-Chow Chiang, "Experience with Mean Value Analysis Models for Evaluating Shared Bus, Throughput-Oriented Multiprocessors" 19 : 90-102, 2003

      6 Men-Chow Chiang, "Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment" 51 (51): 297-317,

      7 Qing Yang, "Analysis of Packet-Switched Multiple-Bus Multiproessor Systems" 50 : 352-357, 2001

      8 J. L. Grino, "Analysis and Simulation of Multiplexed Single-Bus Networks with and without Buffering" 414-421, 1995

      9 Per Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors" 12-24, 2000

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      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2027 평가예정 재인증평가 신청대상 (재인증)
      2021-01-01 평가 등재학술지 유지 (재인증) KCI등재
      2018-01-01 평가 등재학술지 선정 (계속평가) KCI등재
      2016-01-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
      2015-12-01 평가 등재후보 탈락 (기타)
      2014-01-01 평가 등재후보학술지 유지 (계속평가) KCI등재후보
      2013-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2012-01-01 평가 등재후보 1차 FAIL (기타) KCI등재후보
      2011-01-01 평가 등재후보학술지 유지 (등재후보2차) KCI등재후보
      2010-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2008-06-30 학회명변경 한글명 : 디지털산업정보학회 -> (사)디지털산업정보학회
      영문명 : 미등록 -> The Korea Society of Digital Industry and Information Management
      KCI등재후보
      2008-01-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
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      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.46 0.46 0.37
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.29 0.26 0.301 0.24
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