RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      KCI등재 SCIE SCOPUS

      Energy-efficient Key-equation Solving Algorithm for BCH Decoding

      한글로보기

      https://www.riss.kr/link?id=A105527257

      • 0

        상세조회
      • 0

        다운로드
      서지정보 열기
      • 내보내기
      • 내책장담기
      • 공유하기
      • 오류접수

      부가정보

      다국어 초록 (Multilingual Abstract)

      This paper presents an energy-efficient method to solve the key equation in BCH decoding. The key-equation solving block is so complicated that it consumes lots of energy because of multiple registers being dynamically updated every cycle. The block dominates the overall energy dissipation of strong BCH decoding and induces unwanted hotspots. In achieving a high-performance BCH decoder, an energy-efficient algorithm should be developed for solving the key equation. This paper proposes a novel method to detect the case of single error by exploiting the relation among syndromes. If a single-error case is detected, the modified error-locator polynomial is obtained without solving the key-equation. For a (16383, 15543, 60) decoder implemented in a 130nm CMOS process, the proposed method saves 99% and 91% of energy compared to the conventional algorithm and the previous method that detects the error-free case, respectively.
      번역하기

      This paper presents an energy-efficient method to solve the key equation in BCH decoding. The key-equation solving block is so complicated that it consumes lots of energy because of multiple registers being dynamically updated every cycle. The block d...

      This paper presents an energy-efficient method to solve the key equation in BCH decoding. The key-equation solving block is so complicated that it consumes lots of energy because of multiple registers being dynamically updated every cycle. The block dominates the overall energy dissipation of strong BCH decoding and induces unwanted hotspots. In achieving a high-performance BCH decoder, an energy-efficient algorithm should be developed for solving the key equation. This paper proposes a novel method to detect the case of single error by exploiting the relation among syndromes. If a single-error case is detected, the modified error-locator polynomial is obtained without solving the key-equation. For a (16383, 15543, 60) decoder implemented in a 130nm CMOS process, the proposed method saves 99% and 91% of energy compared to the conventional algorithm and the previous method that detects the error-free case, respectively.

      더보기

      목차 (Table of Contents)

      • Abstract
      • I. INTRODUCTION
      • II. SINGLE ERROR DETECTION
      • III. PROPOSED KES ARCHITECTURE
      • IV. EXPERIMENTAL RESULTS
      • Abstract
      • I. INTRODUCTION
      • II. SINGLE ERROR DETECTION
      • III. PROPOSED KES ARCHITECTURE
      • IV. EXPERIMENTAL RESULTS
      • V. CONCLUSION
      • REFERENCES
      더보기

      참고문헌 (Reference)

      1 J. L. Massey, "Shift-register synthesis and BCH decoding" 15 (15): 122-127, 1969

      2 B. Park, "Novel folded-KES architecture for high-speed and area-efficient BCH decoders" 64 (64): 535-539, 2017

      3 W. Liu, "Low-Power, high-throughput BCH error correction VLSI design for multi-level cell NAND flash memories" 303-308, 2006

      4 K. Lee, "Low-Cost, Low-Power and High-Throughput BCH Decoder for NAND Flash Memory" 413-416, 2012

      5 김승현, "Investigation of Retention Characteristics Caused by Charge Loss for Charge Trap NAND Flash Memory" 대한전자공학회 17 (17): 584-590, 2017

      6 "Forward Error Correction for Submarine Systems. ITU Telecommunication Standardization Sector, ITU-T Recommendation G.975"

      7 S. Lin, "Error control coding: Fundamentals and Applications" Prentice-Hall Inc. 2004

      8 B. Park, "Area-optimizaed fully-flexible BCH decoder for multiple GF dimensions" 6 : 14498-14509, 2018

      9 S. Hwang, "An energy-optimized (37840,34320) symmetric BC-BCH decoder for healthy mobile storages" 169-172, 2017

      10 Prashanthi Metku, "Adaptive Multi-path BCH Decoder to Alleviate Hotspot-induced DRAM Bit Error Variation in 3D Heterogeneous Processor" 대한전자공학회 17 (17): 717-728, 2017

      1 J. L. Massey, "Shift-register synthesis and BCH decoding" 15 (15): 122-127, 1969

      2 B. Park, "Novel folded-KES architecture for high-speed and area-efficient BCH decoders" 64 (64): 535-539, 2017

      3 W. Liu, "Low-Power, high-throughput BCH error correction VLSI design for multi-level cell NAND flash memories" 303-308, 2006

      4 K. Lee, "Low-Cost, Low-Power and High-Throughput BCH Decoder for NAND Flash Memory" 413-416, 2012

      5 김승현, "Investigation of Retention Characteristics Caused by Charge Loss for Charge Trap NAND Flash Memory" 대한전자공학회 17 (17): 584-590, 2017

      6 "Forward Error Correction for Submarine Systems. ITU Telecommunication Standardization Sector, ITU-T Recommendation G.975"

      7 S. Lin, "Error control coding: Fundamentals and Applications" Prentice-Hall Inc. 2004

      8 B. Park, "Area-optimizaed fully-flexible BCH decoder for multiple GF dimensions" 6 : 14498-14509, 2018

      9 S. Hwang, "An energy-optimized (37840,34320) symmetric BC-BCH decoder for healthy mobile storages" 169-172, 2017

      10 Prashanthi Metku, "Adaptive Multi-path BCH Decoder to Alleviate Hotspot-induced DRAM Bit Error Variation in 3D Heterogeneous Processor" 대한전자공학회 17 (17): 717-728, 2017

      더보기

      동일학술지(권/호) 다른 논문

      동일학술지 더보기

      더보기

      분석정보

      View

      상세정보조회

      0

      Usage

      원문다운로드

      0

      대출신청

      0

      복사신청

      0

      EDDS신청

      0

      동일 주제 내 활용도 TOP

      더보기

      주제

      연도별 연구동향

      연도별 활용동향

      연관논문

      연구자 네트워크맵

      공동연구자 (7)

      유사연구자 (20) 활용도상위20명

      인용정보 인용지수 설명보기

      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2023 평가예정 해외DB학술지평가 신청대상 (해외등재 학술지 평가)
      2020-01-01 평가 등재학술지 유지 (해외등재 학술지 평가) KCI등재
      2014-01-21 학회명변경 영문명 : The Institute Of Electronics Engineers Of Korea -> The Institute of Electronics and Information Engineers KCI등재
      2010-11-25 학술지명변경 한글명 : JOURNAL OF SEMICONDUTOR TECHNOLOGY AND SCIENCE -> JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE KCI등재
      2010-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
      2009-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2007-01-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
      더보기

      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.42 0.13 0.35
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.3 0.29 0.308 0.03
      더보기

      이 자료와 함께 이용한 RISS 자료

      나만을 위한 추천자료

      해외이동버튼