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      Technology Computer-Aided Design과 결합된 SPICE를 통한 금속-강유전체-반도체 전계효과 트랜지스터의 전기적 특성 해석 = Electrical analysis of Metal-Ferroelectric - Semiconductor Field - Effect Transistor with SPICE combined with Technology Computer-Aided Design

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      https://www.riss.kr/link?id=A101204972

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      다국어 초록 (Multilingual Abstract) kakao i 다국어 번역

      A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor field effect transistor (MFS/MFISFET). The complex behavior of the ferroelectric property was analyzed and surface potential of the channel region in the MFS gate structure was calculated with the numerical TCAD method. Since the calculated surface potential is equivalent with the surface potential obtained with the SPICE model of the conventional MOSFET, we can obtain the current-voltage characteristics of MFS/MFISFET corresponding to the applied gate bias. Therefore, the proposed method will be very useful for the design of the integrated circuits with MFS/MFISFET memory cell devices.
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      A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor fie...

      A simulation method combined with the simulation program with integrated circuit emphasis (SPICE) and the technology computer-aided design (TCAD) has been proposed to estimate the electrical characteristics of the metal-ferroelectric-semiconductor field effect transistor (MFS/MFISFET). The complex behavior of the ferroelectric property was analyzed and surface potential of the channel region in the MFS gate structure was calculated with the numerical TCAD method. Since the calculated surface potential is equivalent with the surface potential obtained with the SPICE model of the conventional MOSFET, we can obtain the current-voltage characteristics of MFS/MFISFET corresponding to the applied gate bias. Therefore, the proposed method will be very useful for the design of the integrated circuits with MFS/MFISFET memory cell devices.

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      참고문헌 (Reference)

      1 "Two-Dimensional Simulation of Ferroelectric Memory cells" 48 (48): 2001

      2 "Physics of the ferroelectric nonvolatile memory field effect transistor" 72 (72): 5999-, 1992

      3 "Parallel-element Macromodel for Ferroelectric Capacitors" 2000

      4 "Operation of single transistor type ferroelectric random access memory" 40 (40): 1397-, 2004

      5 "Operation and Modeling of the MOS Transistor 심선일Technology Computer-Aided Design와 결합된 SPICE를 통한~ PAGE 5마이크로전자 및 패키징학회지 제12권 제1호 Journal of the Microelectronics & Packaging SocietyVol. 12" Mcgraw-hill 59-632005, 199920052005

      6 "Nuamerical Analysis of MetalFerroelectric-semiconductor FieldEffect-Transistors" 1998

      7 "Memory window of Pt/SrBi2Ta2O9/CeO2/SiO2/Si structure for metal ferroelectric insulator semiconductor field effect transistor" 71 (71): 3507-, 1997

      8 "Memory operation of Pt-SrBi2Ta2O9-Y2O3-Si field-effect transistor with damage-free selective dry etching process" 49 : 497-, 2005

      9 "Device Modeling of Ferroelectric Memory Field-Effect Transistor" 2002

      10 "A Novel Simulation Program with Integrated Circuit Emphasis Model of Ferroelectric Capacitors Using Schmitt Trigger Circuit" 40 (40): 2001

      1 "Two-Dimensional Simulation of Ferroelectric Memory cells" 48 (48): 2001

      2 "Physics of the ferroelectric nonvolatile memory field effect transistor" 72 (72): 5999-, 1992

      3 "Parallel-element Macromodel for Ferroelectric Capacitors" 2000

      4 "Operation of single transistor type ferroelectric random access memory" 40 (40): 1397-, 2004

      5 "Operation and Modeling of the MOS Transistor 심선일Technology Computer-Aided Design와 결합된 SPICE를 통한~ PAGE 5마이크로전자 및 패키징학회지 제12권 제1호 Journal of the Microelectronics & Packaging SocietyVol. 12" Mcgraw-hill 59-632005, 199920052005

      6 "Nuamerical Analysis of MetalFerroelectric-semiconductor FieldEffect-Transistors" 1998

      7 "Memory window of Pt/SrBi2Ta2O9/CeO2/SiO2/Si structure for metal ferroelectric insulator semiconductor field effect transistor" 71 (71): 3507-, 1997

      8 "Memory operation of Pt-SrBi2Ta2O9-Y2O3-Si field-effect transistor with damage-free selective dry etching process" 49 : 497-, 2005

      9 "Device Modeling of Ferroelectric Memory Field-Effect Transistor" 2002

      10 "A Novel Simulation Program with Integrated Circuit Emphasis Model of Ferroelectric Capacitors Using Schmitt Trigger Circuit" 40 (40): 2001

      11 "A New circuit Simulation Model of Ferroelectric capacitors" 41 (41): 2654-, 2002

      12 "A BSIM3v3 and DFIM Based Ferroelectric Field Effect Transistor Model" e83-c (e83-c): 1324-, 2000

      13 "A 0.25ß 3.0 V 1T1C Nonvolatile Ferroelectric RAM with Address Transistion Detector Scheme" and Current forcing Latch Sense Amplifier 162 : 2002

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      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2022 평가예정 계속평가 신청대상 (계속평가)
      2021-12-01 평가 등재후보로 하락 (재인증) KCI등재후보
      2018-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2015-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2011-06-28 학술지명변경 한글명 : 마이크전자 및 패키징학회지 -> 마이크로전자 및 패키징학회지
      외국어명 : The Microelectronics and Packaging Society -> Jornal of the Microelectronics and Packaging Society
      KCI등재
      2011-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2009-01-01 평가 등재 1차 FAIL (등재유지) KCI등재
      2007-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2004-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
      2003-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2001-07-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
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      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.48 0.48 0.43
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.39 0.35 0.299 0.35
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