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      SCOPUS SCIE

      Reduction of Threshold Voltage Hysteresis of MoS<sub>2</sub> Transistors with 3-Aminopropyltriethoxysilane Passivation and Its Application for Improved Synaptic Behavior

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      https://www.riss.kr/link?id=A107710609

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      다국어 초록 (Multilingual Abstract)

      <P>Although molybdenum disulfide (MoS<SUB>2</SUB>) is highlighted as a promising channel material, MoS<SUB>2</SUB>-based field-effect transistors (FETs) have a large threshold voltage hysteresis (Δ<I>V</I><SUB>TH</SUB>) from interface traps at their gate interfaces. In this work, the Δ<I>V</I><SUB>TH</SUB> of MoS<SUB>2</SUB> FETs is significantly reduced by inserting a 3-aminopropyltriethoxysilane (APTES) passivation layer at the MoS<SUB>2</SUB>/SiO<SUB>2</SUB> gate interface owing to passivation of the interface traps. The Δ<I>V</I><SUB>TH</SUB> is reduced from 23 to 10.8 V by inserting the 1%-APTES passivation layers because APTES passivation prevents trapping and detrapping of electrons, which are the major source of the Δ<I>V</I><SUB>TH</SUB>. The reduction in the density of interface traps (<I>D</I><SUB>it</SUB>) is confirmed by the improvement of the subthreshold swing (SS) after inserting the APTES layer. Furthermore, the improvement in the synaptic characteristics of the MoS<SUB>2</SUB> FET through the APTES passivation is investigated. Both inhibitory and excitatory postsynaptic currents (PSC) are increased by 33% owing to the reduction in the Δ<I>V</I><SUB>TH</SUB> and the n-type doping effect of the APTES layer; moreover, the linearity of PSC characteristics is significantly improved because the reduction in Δ<I>V</I><SUB>TH</SUB> enables the synaptic operation to be over the threshold region, which is linear. The application of the APTES gate passivation technique to MoS<SUB>2</SUB> FETs is promising for reliable and accurate synaptic applications in neuromorphic computing technology as well as for the next-generation complementary logic applications.</P>
      [FIG OMISSION]</BR>
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      <P>Although molybdenum disulfide (MoS<SUB>2</SUB>) is highlighted as a promising channel material, MoS<SUB>2</SUB>-based field-effect transistors (FETs) have a large threshold voltage hysteresis (Δ<I>V</I&g...

      <P>Although molybdenum disulfide (MoS<SUB>2</SUB>) is highlighted as a promising channel material, MoS<SUB>2</SUB>-based field-effect transistors (FETs) have a large threshold voltage hysteresis (Δ<I>V</I><SUB>TH</SUB>) from interface traps at their gate interfaces. In this work, the Δ<I>V</I><SUB>TH</SUB> of MoS<SUB>2</SUB> FETs is significantly reduced by inserting a 3-aminopropyltriethoxysilane (APTES) passivation layer at the MoS<SUB>2</SUB>/SiO<SUB>2</SUB> gate interface owing to passivation of the interface traps. The Δ<I>V</I><SUB>TH</SUB> is reduced from 23 to 10.8 V by inserting the 1%-APTES passivation layers because APTES passivation prevents trapping and detrapping of electrons, which are the major source of the Δ<I>V</I><SUB>TH</SUB>. The reduction in the density of interface traps (<I>D</I><SUB>it</SUB>) is confirmed by the improvement of the subthreshold swing (SS) after inserting the APTES layer. Furthermore, the improvement in the synaptic characteristics of the MoS<SUB>2</SUB> FET through the APTES passivation is investigated. Both inhibitory and excitatory postsynaptic currents (PSC) are increased by 33% owing to the reduction in the Δ<I>V</I><SUB>TH</SUB> and the n-type doping effect of the APTES layer; moreover, the linearity of PSC characteristics is significantly improved because the reduction in Δ<I>V</I><SUB>TH</SUB> enables the synaptic operation to be over the threshold region, which is linear. The application of the APTES gate passivation technique to MoS<SUB>2</SUB> FETs is promising for reliable and accurate synaptic applications in neuromorphic computing technology as well as for the next-generation complementary logic applications.</P>
      [FIG OMISSION]</BR>

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