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      Intelligent FPGA-Based Image Enhancement Using Wavelet Filtering and Superpixel Segmentation for Real-Time Vision Systems

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      https://www.riss.kr/link?id=A109809717

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      This study proposes a real-time image enhancement framework that combines Daubechies wavelet-based filtering with SLIC (Simple Linear Iterative Clustering) superpixel segmentation, optimized for FPGA implementation. The approach utilizes the spatial clustering properties of SLIC to preserve edges and structural consistency, while the multi-resolution characteristics of the Daubechies-4 wavelet transform enable localized enhancement of fine image details. The system is prototyped using MATLAB for algorithm validation and synthesized in Verilog via the Altera Quartus environment for FPGA deployment. To maximize parallelism and throughput, the architecture employs pipelined modules and adaptive sub-band gain control. Experimental evaluation using standard test images shows that the proposed method achieves a PSNR of up to 29.3 dB, a contrast enhancement ratio of 1.36, and a processing latency of 8 ms. Hardware implementation on Cyclone IV E FPGA demonstrates efficient utilization, with 43% of logic elements and 30% of DSP blocks used, and a peak operating frequency of 140 MHz. These results confirm the system's suitability for real-time imaging applications in domains such as medical diagnostics, remote sensing, and surveillance.
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      This study proposes a real-time image enhancement framework that combines Daubechies wavelet-based filtering with SLIC (Simple Linear Iterative Clustering) superpixel segmentation, optimized for FPGA implementation. The approach utilizes the spatial c...

      This study proposes a real-time image enhancement framework that combines Daubechies wavelet-based filtering with SLIC (Simple Linear Iterative Clustering) superpixel segmentation, optimized for FPGA implementation. The approach utilizes the spatial clustering properties of SLIC to preserve edges and structural consistency, while the multi-resolution characteristics of the Daubechies-4 wavelet transform enable localized enhancement of fine image details. The system is prototyped using MATLAB for algorithm validation and synthesized in Verilog via the Altera Quartus environment for FPGA deployment. To maximize parallelism and throughput, the architecture employs pipelined modules and adaptive sub-band gain control. Experimental evaluation using standard test images shows that the proposed method achieves a PSNR of up to 29.3 dB, a contrast enhancement ratio of 1.36, and a processing latency of 8 ms. Hardware implementation on Cyclone IV E FPGA demonstrates efficient utilization, with 43% of logic elements and 30% of DSP blocks used, and a peak operating frequency of 140 MHz. These results confirm the system's suitability for real-time imaging applications in domains such as medical diagnostics, remote sensing, and surveillance.

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