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      KCI등재

      DEVS 다이어그램 기반 이산사건 시뮬레이션 소프트웨어 구현 및 정적 검증기법: 실용적 접근방법 = Implementation and Static Verification Methodology of Discrete Event Simulation Software based on the DEVS Diagram: A Practical Approach

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      https://www.riss.kr/link?id=A105902007

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      다국어 초록 (Multilingual Abstract)

      Discrete Event System Specification (DEVS) has been used for decades as it provides sound semantics for hierarchical modular specification of discrete event systems. Instead of the mathematical specification, the DEVS diagram, based on the structured DEVS formalism, has provided more intuitive and convenient representation of complex DEVS models. This paper proposes a clean room process for implementation and verification of a DEVS diagram model specification into a simulation software source code. Specifically, it underlies a sequence of transformation steps from conformance and integrity checking of a given diagram model, translation into a corresponding tabular model, and finally conversion to a simulation source code, with each step being inversely verifiable for traceability. A simple example helps developers to understand the proposed process with associated transformation methods; a case study shows that the proposed process is effective for and adaptable to practical simulation software development.
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      Discrete Event System Specification (DEVS) has been used for decades as it provides sound semantics for hierarchical modular specification of discrete event systems. Instead of the mathematical specification, the DEVS diagram, based on the structured ...

      Discrete Event System Specification (DEVS) has been used for decades as it provides sound semantics for hierarchical modular specification of discrete event systems. Instead of the mathematical specification, the DEVS diagram, based on the structured DEVS formalism, has provided more intuitive and convenient representation of complex DEVS models. This paper proposes a clean room process for implementation and verification of a DEVS diagram model specification into a simulation software source code. Specifically, it underlies a sequence of transformation steps from conformance and integrity checking of a given diagram model, translation into a corresponding tabular model, and finally conversion to a simulation source code, with each step being inversely verifiable for traceability. A simple example helps developers to understand the proposed process with associated transformation methods; a case study shows that the proposed process is effective for and adaptable to practical simulation software development.

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      참고문헌 (Reference)

      1 Byun, J.H, "Verification of the DEVS model implementation using aspect embedded DEVS" 2009

      2 Zeigler, B.P., "Theory of Modelling and Simulation (2ndEd.)" Acedemic Press 2000

      3 송해상, "Structured DEVS Formalism: A Structural Modelling Method of Discrete Event Systems" 한국시뮬레이션학회 21 (21): 19-30, 2012

      4 DTaQ, "Simulation model definition document for RAM validation and verification" 2015

      5 DTaQ, "Request for Proposal: Total life-cycle RAM standard dataset system development: third phase"

      6 Saadawi, H., "Principles of discrete event system specification model verification" 89 (89): 41-67, 2013

      7 Karl Wiegers, "Peer Reviews in Software: A Practical Guide" Addison-Wesley Professional 2001

      8 Hong, Ki J., "DEVSpecL-DEVS specification language for modeling, simulation and analysis of discrete event systems" 48 (48): 221-234, 2006

      9 Kim, T. G., "DEVSim++ Toolset for Defense Modeling and Simulation and Interoperation" 8 (8): 129-142, 2011

      10 Song, H.S., "DEVS Diagram Revised: A Structred Approach For DEVS Modling" 2010

      1 Byun, J.H, "Verification of the DEVS model implementation using aspect embedded DEVS" 2009

      2 Zeigler, B.P., "Theory of Modelling and Simulation (2ndEd.)" Acedemic Press 2000

      3 송해상, "Structured DEVS Formalism: A Structural Modelling Method of Discrete Event Systems" 한국시뮬레이션학회 21 (21): 19-30, 2012

      4 DTaQ, "Simulation model definition document for RAM validation and verification" 2015

      5 DTaQ, "Request for Proposal: Total life-cycle RAM standard dataset system development: third phase"

      6 Saadawi, H., "Principles of discrete event system specification model verification" 89 (89): 41-67, 2013

      7 Karl Wiegers, "Peer Reviews in Software: A Practical Guide" Addison-Wesley Professional 2001

      8 Hong, Ki J., "DEVSpecL-DEVS specification language for modeling, simulation and analysis of discrete event systems" 48 (48): 221-234, 2006

      9 Kim, T. G., "DEVSim++ Toolset for Defense Modeling and Simulation and Interoperation" 8 (8): 129-142, 2011

      10 Song, H.S., "DEVS Diagram Revised: A Structred Approach For DEVS Modling" 2010

      11 Sung, Changho., "Collaborative Modeling Process for Development of Domain-Specific Discrete Event Simulation Systems" 42 (42): 532-546, 2012

      12 Mills, H.D., "Cleanroom Software Engineering"

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      학술지 이력

      학술지 이력
      연월일 이력구분 이력상세 등재구분
      2026 평가예정 재인증평가 신청대상 (재인증)
      2020-01-01 평가 등재학술지 유지 (재인증) KCI등재
      2017-01-01 평가 등재학술지 유지 (계속평가) KCI등재
      2013-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2010-01-01 평가 등재학술지 유지 (등재유지) KCI등재
      2007-01-01 평가 등재학술지 선정 (등재후보2차) KCI등재
      2006-01-01 평가 등재후보 1차 PASS (등재후보1차) KCI등재후보
      2005-06-22 학술지명변경 외국어명 : 미등록 -> JOURNAL OF THE KOREA SOCIETY FOR SIMULATION KCI등재후보
      2004-01-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
      2004-01-01 평가 등재후보 탈락 (등재후보1차)
      2002-01-01 평가 등재후보 1차 FAIL (등재후보1차) KCI등재후보
      2000-07-01 평가 등재후보학술지 선정 (신규평가) KCI등재후보
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      학술지 인용정보

      학술지 인용정보
      기준연도 WOS-KCI 통합IF(2년) KCIF(2년) KCIF(3년)
      2016 0.3 0.3 0.32
      KCIF(4년) KCIF(5년) 중심성지수(3년) 즉시성지수
      0.28 0.25 0.541 0.11
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