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    Analysis of Flat Band Voltage Dependent Breakdown Voltage for Sub-10 nm DGMOSFET

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    https://www.riss.kr/link?id=A103269747

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    A model for the flat band voltage dependent breakdown voltage of sub-10 nm doublegate MOSFETs (DGMOSFETs) is proposed in this paper. Flat band voltage of gates is process dependent parameter by unintended process variables and uncertainties. Since variation of flat band voltage significantly effects on current-voltage characteristics, breakdown voltage depends on flat band voltage. Since avalanche is not occurred in sub- 10 nm DGMOSFETs, breakdown by punch-through effect arises from lowering of potential energy emerges even in the region of low drain voltage. The drain breakdown voltage becomes very small with dramatic down scaling due to abrupt increasing of tunneling current. The new model is used to investigate the flat band voltage dependent breakdown voltage with parameters of channel dimension and top/bottom oxide thickness of sub-10 nm DGMOSFET. The breakdown voltage is decreased with reduction of channel length and flat band voltage and increase of channel thickness. The breakdown voltage is varied for top/bottom gate oxide thicknesses.
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    A model for the flat band voltage dependent breakdown voltage of sub-10 nm doublegate MOSFETs (DGMOSFETs) is proposed in this paper. Flat band voltage of gates is process dependent parameter by unintended process variables and uncertainties. Since var...

    A model for the flat band voltage dependent breakdown voltage of sub-10 nm doublegate MOSFETs (DGMOSFETs) is proposed in this paper. Flat band voltage of gates is process dependent parameter by unintended process variables and uncertainties. Since variation of flat band voltage significantly effects on current-voltage characteristics, breakdown voltage depends on flat band voltage. Since avalanche is not occurred in sub- 10 nm DGMOSFETs, breakdown by punch-through effect arises from lowering of potential energy emerges even in the region of low drain voltage. The drain breakdown voltage becomes very small with dramatic down scaling due to abrupt increasing of tunneling current. The new model is used to investigate the flat band voltage dependent breakdown voltage with parameters of channel dimension and top/bottom oxide thickness of sub-10 nm DGMOSFET. The breakdown voltage is decreased with reduction of channel length and flat band voltage and increase of channel thickness. The breakdown voltage is varied for top/bottom gate oxide thicknesses.

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    목차 (Table of Contents)

    • Abstract
    • I. INTRODUCTION
    • Ⅱ. Modeling Scheme for asymmetric DGMOSFET
    • Ⅲ. RESULTS
    • Ⅳ. DISCUSSION AND CONCLUSIONS
    • Abstract
    • I. INTRODUCTION
    • Ⅱ. Modeling Scheme for asymmetric DGMOSFET
    • Ⅲ. RESULTS
    • Ⅳ. DISCUSSION AND CONCLUSIONS
    • REFERENCES
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