Nano CMOS 적용을 위한 Shallow Silicided Junction의 Leakage 개선 및 Flicker Noise 분석 = Analysis of Shallow siilicided Junction Leakage and Flicker Noise for Nano CMOSFET

다국어 초록 (Multilingual Abstract)

As scaled down the size of device, it needs to make a shallow junction for preventing the punch through and short channel effect. But, at reverse bias, shallow junction increased a leakage current. Also, the leakage current was more increased by forming of non-uniform silicide/si interface and local spiking. The leakage current problems of shallow silicidation are being issued because silicide is necessary for CMOSFET of nano-scale gate length. It can consider factors of leakage problem that are junction depth, silicon consumption, distance between silicide and junction, thickness of silicide, and space of silicide. In this paper, an optimal space of silicide was suggested by split experiment of silicide space. Also, the junction leakage can be achieved through co-implantation processing that was executed by split dose of Boron. And then, the more dose increase, the more junction depth increase. The results improved junction leakage because generated defects when ion implantation were reduced.
It is presented that flicker (1/f) noise of ultra thin gate oxide can be improved by initial oxidation and subsequent plasma nitridation(PN). Three different types of initial oxidation prior to plasma nitridation are investigated. it is shown that STO has lower drain current noise power (Sid) than the others. The interface trap densities(Dit) of each oxide is characterized by charge pumping method. Finally, we reached a conclusion that the 1/f noise can be significantly reduced by initial STO and Plasma nitridation in Nano CMOS technology.