연속-시간 펄스-폭-변조 ADC를 위한LUT 기반 데시메이션 필터 설계 = Design of LUT-Based Decimation Filter for Continuous-Time PWM ADC

국문 초록 (Abstract)

연속-시간 델타-시그마 ADC는 별도의 안티-엘리아싱 필터가 필요하지 않고, 이산-시간 델타-시그마 ADC에 비해 적은전력 소모로 넓은 대역폭의 신호를 처리할 수 있는 등 여러 가지 장점을 가지고 있다. 그러나 델타-시그마 ADC의 특성상높은 주파수의 클럭으로 신호를 샘플링 하여야 하기 때문에, 이를 낮은 데이터 레이트의 고해상도 디지털 신호로 에일리어싱없이 낮춰 주기 위한 데시메이션 필터가 복잡하고 고속으로 동작해야 한다. 이 논문에서는 연속-시간 델타-시그마 ADC에펄스-폭-변조를 적용한 구조를 제안하고 이 구조를 이용함으로써 데시메이션 필터를 룩업 테이블을 이용하여 간단하게 구현할 수 있음을 보인다.

다국어 초록 (Multilingual Abstract)

A continuous-time Delta-Sigma ADC has various benefits; it does not require an explicit anti-aliasing filter, and itis able to handle wider-band signals with less power consumption in comparison with a discrete-time Delta-SigmaADC. However, it inherently needs to sample the signal with a high-speed clock, necessitating a complex decimationfilter that operates at high speed in order to convert the modulator output to a low-rate high-resolution digital signalswithout causing aliasing. This paper proposes a continuous-time Delta-Sigma ADC architecture that employspulse-width modulation and shows that the proposed architecture lends itself to a simpler implementation of thedecimation filter using a lookup table.

참고문헌 (Reference)

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