Performance Evaluation of Various Bus Clamped Space Vector Pulse Width Modulation Techniques

Nair, Meenu D.,Biswas, Jayanta,Vivek, G.,Barai, Mukti The Korean Institute of Power Electronics 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.5

The space vector pulse width modulation (SVPWM) technique is a popular PWM method for medium voltage drive applications. Conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are the most common SVPWM techniques. This paper evaluates the performance of various advanced BCSVPWM strategies in terms of their harmonic distortion and switching loss based on a uniform frame work. A uniform frame work, pulse number captures the performance parameter variations of different SVPWM strategies for various number of samples with heterogeneous pulse numbers. This work compares different advanced BCSVPWM techniques based on the modulation index and location of the clamping position (zero vector changing angle ) of a phase in a line cycle. The frame work provides a fixed fundamental frequency of 50Hz. The different BCSVPWM switching strategies are implemented and compared experimentally on a 415V, 2.2kW, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter (VSI) with a DC bus voltage of 400 V. A low cost PIC microcontroller (PIC18F452) is used as the controller platform.

Comparative Study of Minimum Ripple Switching Loss PWM Hybrid Sequences for Two-level VSI Drives

G. Vivek,Jayanta Biswas,Meenu D. Nair,Mukti Barai 전력전자학회 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.6

Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

Optimum Hybrid SVPWM Technique for Three-level Inverter on the Basis of Minimum RMS Flux Ripple

Meenu D. Nair,Jayanta Biswas,G. Vivek,Mukti Barai 전력전자학회 2019 JOURNAL OF POWER ELECTRONICS Vol.19 No.2

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

Optimum Hybrid SVPWM Technique for Three-level Inverter on the Basis of Minimum RMS Flux Ripple

Nair, Meenu D.,Biswas, Jayanta,Vivek, G.,Barai, Mukti The Korean Institute of Power Electronics 2019 JOURNAL OF POWER ELECTRONICS Vol.19 No.2

This paper presents an optimum hybrid SVPWM technique for three-level voltage source inverters (VSIs). The proposed hybrid SVPWM technique aims to minimize total harmonic distortion (THD). A new parameter is introduced to incorporate the heterogeneous nature of switching sequences of SVPWM technique. The proposed hybrid SVPWM technique is implemented on a low-cost PIC microcontroller (PIC18F452) and verified experimentally with a 2 KVA three-phase three-level insulated gate bipolar transistor-based VSI. Optimum switching sequence results in the three-level inverter configuration are demonstrated. The proposed hybrid SVPWM technique improves the THD performance by 17.3% compared with the best available three-level SVPWM technique.

Comparative Study on SVPWM Switching Sequences for VSIs

Vivek, G.,Biswas, Jayanta,Nair, Meenu D.,Barai, Mukti The Korean Institute of Electrical Engineers 2018 Journal of Electrical Engineering & Technology Vol.13 No.1

Paper presents a comparative study of space vector pulse width modulation (SVPWM) switching sequences for Voltage Source Inverters (VSIs). Various SVPWM switching sequences are studied for two and three level VSIs in linear modulation index region. The computations of dwell times are presented for two and three level VSIs based on space vector geometry in a synchronized and optimized manner. The existing SVPWM switching sequences are implemented using Matlab / Simulink and in an experimental setup for three phase two and three level VSIs. The simulation and experimental waveforms of conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are demonstrated for two and three level inverter respectively. The performance of different SVPWM switching sequences are evaluated and presented based on weighted voltage total harmonic distortion (THD).

Comparative Study on SVPWM Switching Sequences for VSIs

G. Vivek,Jayanta Biswas,Meenu D. Nair,Mukti Barai 대한전기학회 2018 Journal of Electrical Engineering & Technology Vol.13 No.1

Paper presents a comparative study of space vector pulse width modulation (SVPWM) switching sequences for Voltage Source Inverters (VSIs). Various SVPWM switching sequences are studied for two and three level VSIs in linear modulation index region. The computations of dwell times are presented for two and three level VSIs based on space vector geometry in a synchronized and optimized manner. The existing SVPWM switching sequences are implemented using Matlab / Simulink and in an experimental setup for three phase two and three level VSIs. The simulation and experimental waveforms of conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are demonstrated for two and three level inverter respectively. The performance of different SVPWM switching sequences are evaluated and presented based on weighted voltage total harmonic distortion (THD).

Comparative Study of Minimum Ripple Switching Loss PWM Hybrid Sequences for Two-level VSI Drives

Vivek, G.,Biswas, Jayanta,Nair, Meenu D.,Barai, Mukti The Korean Institute of Power Electronics 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.6

Voltage source inverters (VSIs) are widely used to drive induction motors in industry applications. The quality of output waveforms depends on the switching sequences used in pulse width modulation (PWM). In this work, all existing optimal space vector pulse width modulation (SVPWM) switching strategies are studied. The performance of existing SVPWM switching strategies is optimized to realize a tradeoff between quality of output waveforms and switching losses. This study generalizes the existing optimal switching sequences for total harmonic distortions (THDs) and switching losses for different modulation indexes and reference angles with a parameter called quality factor. This factor provides a common platform in which the THDs and switching losses of different SVPWM techniques can be compared. The optimal spatial distribution of each sequence is derived on the basis of the quality factor to minimize harmonic current distortions and switching losses in a sector; the result is the minimum ripple loss SVPWM (MRSLPWM). By employing the sequences from optimized switching maps, the proposed method can simultaneously reduce THDs and switching losses. Two hybrid SVPWM techniques are proposed to reduce line current distortions and switching losses in motor drives. The proposed hybrid SVPWM strategies are MRSLPWM 30 and MRSLPWM 90. With a low-cost PIC microcontroller (PIC18F452), the proposed hybrid SVPWM techniques and the quality of output waveforms are experimentally validated on a 2 kVA VSI based on a three-phase two-level insulated gate bipolar transistor.

Performance Evaluation of Various Bus Clamped Space Vector Pulse Width Modulation Techniques

Meenu D. Nair,Jayanta Biswas,G. Vivek,Mukti Barai 전력전자학회 2017 JOURNAL OF POWER ELECTRONICS Vol.17 No.5

The space vector pulse width modulation (SVPWM) technique is a popular PWM method for medium voltage drive applications. Conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are the most common SVPWM techniques. This paper evaluates the performance of various advanced BCSVPWM strategies in terms of their harmonic distortion and switching loss based on a uniform frame work. A uniform frame work, pulse number captures the performance parameter variations of different SVPWM strategies for various number of samples with heterogeneous pulse numbers. This work compares different advanced BCSVPWM techniques based on the modulation index and location of the clamping position (zero vector changing angle ) of a phase in a line cycle. The frame work provides a fixed fundamental frequency of 50Hz. The different BCSVPWM switching strategies are implemented and compared experimentally on a 415V, 2.2kW, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter (VSI) with a DC bus voltage of 400 V. A low cost PIC microcontroller (PIC18F452) is used as the controller platform.

A Simple Real-Time DMPPT Algorithm for PV Systems Operating under Mismatch Conditions

Aniruddha Kamath M.,Jayanta Biswas,Anjana K. G.,Mukti Barai 전력전자학회 2018 JOURNAL OF POWER ELECTRONICS Vol.18 No.3

This paper presents a distributed maximum power point tracking (DMPPT) algorithm based on the reference voltage perturbation (RVP) method for the PV modules of a series PV string. The proposed RVP-DMPPT algorithm is developed to accurately track the maximum power point (MPP) for each PV module operating under all atmospheric conditions with a reduced hardware overhead. To study the influence of parameters such as the controller reference voltage (Vref) and PV current (Ipv) on the PV string voltage, a small signal model of a unidirectional differential power processing (DPP) based PV-Bus architecture is developed. The steady state and dynamic performances of the proposed RVP DMPPT algorithm and small signal model of the unidirectional DPP based PV-Bus architecture are demonstrated with simulations and experimental results. The accuracy of the RVP DMPPT algorithm is demonstrated by obtaining a tracking efficiency of 99.4% from the experiment.

An efficient hybrid digital architecture for space vector PWM method for multilevel VSI

Anjana, K.G.,Aswini Kumar, M.,Biswas, Jayanta,Barai, Mukti The Korean Institute of Power Electronics 2020 JOURNAL OF POWER ELECTRONICS Vol.20 No.5

This paper presents an efficient, cost effective design implementation of a hybrid digital architecture for space vector pulse width modulation (SVPWM) method for multilevel inverters (MLIs). The SVPWM method is one of the most popular real time PWM method for three phase voltage source inverter (VSI). The implementation of SVPWM method becomes complex with an increase in the number of levels in a multilevel inverter. The SVPWM method for multilevel inverter is a multitask system. The main constraint when it comes to implementing SVPWM for multilevel inverters is the processing of dwell time computation and the generation of PWM gate signals for all of the switches with an accurate delay. A hybrid hardware structure consisting of a simple low-cost, low-power dsPIC micro controller (dsPIC 30F4011) and a state of the art Field Programmable Gate Array (FPGA) (Cyclone V 5CGXFC5C6F27C7N) is used to implement SVPWM. The proposed hybrid digital architecture utilizes the advantages and resources of the dsPIC and FPGA. The hybrid digital architecture meets the timing constraints of multitasking through synchronization and parallelism. A communication interface between the dsPIC and the FPGA reduces the design complexity. The software overhead for the communication interface remains fixed for any number of levels. The hybrid structure of the digital architecture provides scalability for the SVPWM method with more number of levels in multilevel inverter. The operation of the proposed hybrid digital architecture is experimentally validated with an optimized SVPWM method for a five level VSI. An optimized region identification algorithm and simple dwell time expressions are described for a five level SVPWM. The input DC of the five level VSI is obtained from a differential power processing (DPP) based PV system. Experimental results under different operating conditions are presented.