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      • KCI등재

        고려적 국제(國制) 운용의 인식적 맥락들

        최종석 ( Choi¸ Jong-suk ) 고려대학교 민족문화연구원 2021 民族文化硏究 Vol.92 No.-

        본고는 베트남의 外王內帝 체제와 이질적인 고려전기 이중 체제의 양상이 어떠한 지적 맥락에서 발현·귀결되었는지를 탐색한 연구 작업이다. 필자는 고려 나름의 이중 체제 양상뿐만 아니라 그러한 양상에 작용한 지적 환경 또한 베트남과는 이질적이었을 것으로 보고, 베트남과 다르지 않았을 것으로 간주해 온 종래의 연구와 달리, 고려전기 텍스트를 그 시대의 맥락 속에서 파악하는 작업에 의지해서 새로운 지적 맥락을 탐색하였다. 단 이중 체제 가운데 國制 방면에 집중하여 고려 나름의 國制 양상이 어떠한 지적 맥락에서 성립·운영되었는지를 밝혀보고자 했다. 종래의 연구는 고려의 국제가 황제국 체제였고, 그러한 체제는 중국 왕조를 의식한 자주·대등 의식에서 비롯되었다고 보았는데, 본고에서는 황제국 체제와 거리가 먼 고려 나름의 國制 양상이 중국 왕조를 의식한 자주·대등 의식과는 전혀 다른 지적 맥락에서 성립·운영되었음을 규명해 보았다. I had explored the actual aspects of the dual system of the early Koryo Dynasty, which were heterogeneous from Vietnam, through comparison with the premodern Vietnamese case of practicing the “Feudal Exterior/Imperial Interior” doctrine(外王內帝). This paper is a companion study to this previous research, and it is a research work that explores the intellectual context in which the aspects of the dual system of the early Koryo emerged and resulted. In my view, not only the aspect but also the intellectual environment that acted on the dual system aspect of the early Koryo itself was heterogeneous from Vietnam. Relying on it, I explored a new intellectual context. Especially, I tried to clarify the intellectual context in which aspects of the political system unique to Koryo were established and operated by focusing on political regime. Previous studies have seen that the political system of Koryo was an imperial system, and that such a system was derived from a consciousness of independence against the Chinese dynasty and a consciousness of equality with the Chinese dynasty. Contrary to this approach, I explored in what kind of intellectual context it was established and operated.

      • KCI등재

        The Design of a 0.15 ps High Resolution Time-to-Digital Converter

        Jongsuk Lee,Yong Moon 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.3

        This research outlines the design of a HRTDC (High Resolution Time-to-Digital Converter) for high data rate communication systems using a 0.18 μm CMOS process. The coarse-fine architecture has been adopted to improve the resolution of the TDC. A two-stage vernier time amplifier (2S-VTA) was used to amplify the time residue, and the gain of the 2SVTA was larger than 64. The error during time amplification was compensated using two FTDCs (Fine-TDC) with their outputs. The resolution of the HR-TDC was 0.15 ps with a 12-bit output and the power consumption was 4.32 mW with a 1.8-V supply voltage.

      • Bra Cup Sizes Using 3D Body Scan Manual Measurements

        Jongsuk Chun,Seolyoung Oh 대한인간공학회 2011 대한인간공학회 학술대회논문집 Vol.2011 No.10

        Objective: This study aims to examine the brassiere cup sizing system using direct measurements of 3D body scan data. Background: Breast shape has complex curving surface so that the methods of breast size measurement have many measurement error and consumers have problems for finding proper bra size. But 3D body scanner supplies the new ideal data for women's breast circumference measurement. This study developed 3D manual measurement method. Method: 32 women's 3D body scan data were selected in Size Korea. 3D scan data were measured in three methods. (1)2D direct measurement. (2)3D automatic measurement. (3)3D manual measurement. 3D body scan data sliced in horizontal lines were measured by AutoCAD program. Results: The t-test results of chest girth, bust girth and bra cup size showed significant difference between 2D direct measurements and 3D automatic measurements. Bra cup sizes by 3D automatic measurements were larger than 2D direct measurements, whereupon some subjects were classified as wrong bra sizes. Conclusion: The method using slice line along body surface (A line) was more useful to determine bra cup sizes than the method using simplified surface line (B line). Application: The 3D manual method can be used for measuring bra cup size.

      • KCI등재

        Agricultural Safety Clothing

        Jongsuk Chun,Jungwoo Jee,Kyoung Sook Hwang 대한인간공학회 2011 大韓人間工學會誌 Vol.30 No.4

        Objective: The study was performed to suggest factors to consider when making or selecting protective clothing to enhance farmers’ health. The purpose of this study was to review and summarize the agricultural safety technology on clothing including hat, gloves, and shoes. Background: The farmers’ work clothing has to meet a multitude of requirement. Risk factors in farm-work were identified by previous researches. Agricultural safety clothing needs to be introduced. Method: We reviewed previous papers regarding the agricultural workers’ health, safety clothing to protect body from excessive heat and humid environment, ultraviolet(UV) protection, and hazardous body working postures. Also the UV cut effect, pesticideproof clothing, and preventable farm work related musculoskeletal disorders were discussed. Results: The agricultural safety clothing needs to be developed to provide comfort and to be resistant against heat. The UV protection function on skin and eyes has not been fully researched in safety clothing studies yet. Conclusions and Application: The farmers’ work-related body posture needs to be studied in order to make and design agricultural safety clothing. The safety issues on agricultural work shoes are also needed to be included in future studies.

      • KCI등재

        A Design of Vernier Coarse-Fine Time-to-Digital Converter using Single Time Amplifier

        Jongsuk Lee,Yong Moon 대한전자공학회 2012 Journal of semiconductor technology and science Vol.12 No.4

        A Coarse-Fine Time-to-Digital Converter (TDC) using the single time amplifier is proposed. A vernier delay line is used to overcome process dependency and the 2-stage time amplifier is designed to have high resolution by increasing the gain of the time amplifier. Single time amplifier architecture reduces the silicon area of the TDC and alleviates mismatch effect between time amplifiers. The proposed TDC is implemented in 0.18 ㎛ CMOS process with the supply voltage of 1.8 V. The measured results show that the resolution of the TDC is 0.73 ㎰ with 10-bit digital output, although highend process is not applied. The single time amplifier architecture reduces 13% of chip area compared to previous work. By reducing the supply voltage, the linearity of the TDC is enhanced and the resolution is decreased to 1.45 ㎰.

      • A Study on the development of ergonomic functional clothing

        Jongsuk Chun,Jung Woo Jee 대한인간공학회 2011 대한인간공학회 학술대회논문집 Vol.2011 No.5

        Objective: The aim of this study is to explore a method of making functional clothing empower the skeletal muscle and supporting neutral body posture. Background: Performing static or dynamic physical activities without body supporting device often cause health and safety disadvantage. For body supporting the researchers developed ergonomic functional clothing (EFC). It was expected to balance body posture and strength during working at static or dynamic activities. Method: Fabric skeletal muscle device was applied to the fabric body frame. The body frame was made from a 3D body scan surface data to reproduce human skeletal system. Results: The upper-body EFC was made with 16 fabric skeletal muscles. 17 fabric muscles were developed for the EFC covering arm and 24 fabric muscles were developed for the lowerbody EFC.

      • KCI등재
      • SCIESCOPUSKCI등재

        A stable U-band VCO in 65 nm CMOS with -0.11 dBm high output power

        Jongsuk Lee,Yong Moon 대한전자공학회 2015 Journal of semiconductor technology and science Vol.15 No.4

        A high output power voltage controlled oscillator (VCO) in the U-band was implemented using a 65 nm CMOS process. The proposed VCO used a transmission line to increase output voltage swing and overcome the limitations of CMOS technologies. Two varactor banks were used for fine tuning with a 5% frequency tuning range. The proposed VCO showed small variation in output voltage and operated at 51.55-54.18 GHz. The measured phase noises were -51.53 dBc/Hz, -91.84 dBc/Hz, and -101.07 dBc/Hz at offset frequencies of 10 kHz, 1 MHz, and 10 MHz, respectively, with stable output power. The chip area, including the output buffer, is 0.16×0.16 ㎟ and the maximum output power was -0.11 dBm. The power consumption was 33.4 mW with a supply voltage of 1.2-V. The measured FOMP was -190.8 dBc/Hz.

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